diff mbox series

drm/i915/display: Adjust Added Wake Time with PKG_C_LATENCY

Message ID 20241118052327.2475743-1-animesh.manna@intel.com (mailing list archive)
State New
Headers show
Series drm/i915/display: Adjust Added Wake Time with PKG_C_LATENCY | expand

Commit Message

Animesh Manna Nov. 18, 2024, 5:23 a.m. UTC
The PKG_C_LATENCY Added Wake Time field is not working.
When added wake time is needed, such as for flip queue
DSB execution, increase the PKG_C_LATENCY Pkg C Latency
field by the added wake time.

HSD: 14023564296
WA: 22020432604

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/skl_watermark.c | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Kandpal, Suraj Nov. 18, 2024, 5:54 a.m. UTC | #1
> -----Original Message-----
> From: Manna, Animesh <animesh.manna@intel.com>
> Sent: Monday, November 18, 2024 10:53 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Kandpal, Suraj <suraj.kandpal@intel.com>; Manna, Animesh
> <animesh.manna@intel.com>
> Subject: [PATCH] drm/i915/display: Adjust Added Wake Time with
> PKG_C_LATENCY
> 
> The PKG_C_LATENCY Added Wake Time field is not working.
> When added wake time is needed, such as for flip queue DSB execution,
> increase the PKG_C_LATENCY Pkg C Latency field by the added wake time.
> 
> HSD: 14023564296

No need to add the HSD like this the WA no should be enough
Also I would like for you to hold on this series since there is another WA I have sent which clashes with this can you build it over that
It has quite a lot of refactors so it would be better to rebase them on that here is a reference to that series.
https://patchwork.freedesktop.org/series/141412/

Regards,
Suraj Kandpal

> WA: 22020432604
> 
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  drivers/gpu/drm/i915/display/skl_watermark.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c
> b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 1a4c1fa24820..9be38ca5346d 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -2875,6 +2875,12 @@ skl_program_dpkgc_latency(struct
> drm_i915_private *i915, bool enable_dpkgc)
>  		added_wake_time = 0;
>  	}
> 
> +	/* Wa_22020432604 */
> +	if (DISPLAY_VER(i915) == 30) {
> +		max_latency += added_wake_time;
> +		added_wake_time = 0;
> +	}
> +
>  	clear |= LNL_ADDED_WAKE_TIME_MASK |
> LNL_PKG_C_LATENCY_MASK;
>  	val |= REG_FIELD_PREP(LNL_PKG_C_LATENCY_MASK, max_latency);
>  	val |= REG_FIELD_PREP(LNL_ADDED_WAKE_TIME_MASK,
> added_wake_time);
> --
> 2.29.0
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 1a4c1fa24820..9be38ca5346d 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -2875,6 +2875,12 @@  skl_program_dpkgc_latency(struct drm_i915_private *i915, bool enable_dpkgc)
 		added_wake_time = 0;
 	}
 
+	/* Wa_22020432604 */
+	if (DISPLAY_VER(i915) == 30) {
+		max_latency += added_wake_time;
+		added_wake_time = 0;
+	}
+
 	clear |= LNL_ADDED_WAKE_TIME_MASK | LNL_PKG_C_LATENCY_MASK;
 	val |= REG_FIELD_PREP(LNL_PKG_C_LATENCY_MASK, max_latency);
 	val |= REG_FIELD_PREP(LNL_ADDED_WAKE_TIME_MASK, added_wake_time);