Message ID | 20241119-upstream_s32cc_gmac-v5-4-7dcc90fcffef@oss.nxp.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | Add support for Synopsis DWMAC IP on NXP Automotive SoCs S32G2xx/S32G3xx/S32R45 | expand |
On Tue, Nov 19, 2024 at 04:00:10PM +0100, Jan Petrous via B4 Relay wrote: > From: "Jan Petrous (OSS)" <jan.petrous@oss.nxp.com> > > The RGMII interface supports three data rates: 10/100 Mbps > and 1 Gbps. These speeds correspond to clock frequencies > of 2.5/25 MHz and 125 MHz, respectively. > > Many Ethernet drivers, including glues in stmmac, follow > a similar pattern of converting RGMII speed to clock frequency. > > To simplify code, define the helper rgmii_clock(speed) > to convert connection speed to clock frequency. > > Suggested-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> > Reviewed-by: Andrew Lunn <andrew@lunn.ch> > Signed-off-by: Jan Petrous (OSS) <jan.petrous@oss.nxp.com> Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Thanks!
diff --git a/include/linux/phy.h b/include/linux/phy.h index a98bc91a0cde..e28c971d7616 100644 --- a/include/linux/phy.h +++ b/include/linux/phy.h @@ -298,6 +298,29 @@ static inline const char *phy_modes(phy_interface_t interface) } } +/** + * rgmii_clock - map link speed to the clock rate + * @speed: link speed value + * + * Description: maps RGMII supported link speeds + * into the clock rates. + * + * Returns: clock rate or negative errno + */ +static inline long rgmii_clock(int speed) +{ + switch (speed) { + case SPEED_10: + return 2500000; + case SPEED_100: + return 25000000; + case SPEED_1000: + return 125000000; + default: + return -EINVAL; + } +} + #define PHY_INIT_TIMEOUT 100000 #define PHY_FORCE_TIMEOUT 10