| Message ID | 20241122073006.99309-2-amadeus@jmu.edu.cn |
|---|---|
| State | New |
| Headers | show |
| Series | [1/2] arm64: dts: rockchip: rk3568: add reset-names for combphy | expand |
Am Freitag, 22. November 2024, 08:30:06 CET schrieb Chukun Pan: > Currently, the USB port via combophy on the RK3528/RK3588 SoC is broken. > > usb usb8-port1: Cannot enable. Maybe the USB cable is bad? > > This is due to the combphy of RK3528/RK3588 SoC has multiple resets, but > only "phy resets" need assert and deassert, "apb resets" don't need. > So change the driver to only match the phy resets, which is also what > the vendor kernel does. > > Fixes: 7160820d742a ("phy: rockchip: add naneng combo phy for RK3568") > Cc: FUKAUMI Naoki <naoki@radxa.com> > Cc: Michael Zimmermann <sigmaepsilon92@gmail.com> > Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> > --- > drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c > index 0a9989e41237..2eb3329ca23f 100644 > --- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c > +++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c > @@ -309,7 +309,7 @@ static int rockchip_combphy_parse_dt(struct device *dev, struct rockchip_combphy > > priv->ext_refclk = device_property_present(dev, "rockchip,ext-refclk"); > > - priv->phy_rst = devm_reset_control_array_get_exclusive(dev); > + priv->phy_rst = devm_reset_control_get(dev, "phy"); > if (IS_ERR(priv->phy_rst)) > return dev_err_probe(dev, PTR_ERR(priv->phy_rst), "failed to get phy reset\n"); That reset-control is deasserted in the driver in a place where already parts of the phy are supposed to be configured, so it wiggling the apb_reset at those places (i.e. after running priv->cfg->combphy_cfg()) probably causes strange effects, so Reviewed-by: Heiko Stuebner <heiko@sntech.de>
diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c index 0a9989e41237..2eb3329ca23f 100644 --- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c +++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c @@ -309,7 +309,7 @@ static int rockchip_combphy_parse_dt(struct device *dev, struct rockchip_combphy priv->ext_refclk = device_property_present(dev, "rockchip,ext-refclk"); - priv->phy_rst = devm_reset_control_array_get_exclusive(dev); + priv->phy_rst = devm_reset_control_get(dev, "phy"); if (IS_ERR(priv->phy_rst)) return dev_err_probe(dev, PTR_ERR(priv->phy_rst), "failed to get phy reset\n");
Currently, the USB port via combophy on the RK3528/RK3588 SoC is broken. usb usb8-port1: Cannot enable. Maybe the USB cable is bad? This is due to the combphy of RK3528/RK3588 SoC has multiple resets, but only "phy resets" need assert and deassert, "apb resets" don't need. So change the driver to only match the phy resets, which is also what the vendor kernel does. Fixes: 7160820d742a ("phy: rockchip: add naneng combo phy for RK3568") Cc: FUKAUMI Naoki <naoki@radxa.com> Cc: Michael Zimmermann <sigmaepsilon92@gmail.com> Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> --- drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)