| Message ID | 20241125-dsi-relax-v2-2-9113419f4a40@geanix.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | drm/stm: dsi: relax mode_valid clock tolerance | expand |
On Mon, 25 Nov 2024 14:49:27 +0100, Sean Nyekjaer wrote: > Use new helper function for HDMI mode validation > > Signed-off-by: Sean Nyekjaer <sean@geanix.com> Reviewed-by: Maxime Ripard <mripard@kernel.org> Thanks! Maxime
On Mon, Nov 25, 2024 at 9:50 PM Sean Nyekjaer <sean@geanix.com> wrote: > > Use new helper function for HDMI mode validation This is a bit misleading since this is actually the DPI or parallel output encoder, not HDMI. HDMI is in drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c and drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c ChenYu > Signed-off-by: Sean Nyekjaer <sean@geanix.com> > --- > drivers/gpu/drm/sun4i/sun4i_rgb.c | 22 ++++------------------ > 1 file changed, 4 insertions(+), 18 deletions(-) > > diff --git a/drivers/gpu/drm/sun4i/sun4i_rgb.c b/drivers/gpu/drm/sun4i/sun4i_rgb.c > index dfb6acc42f02efc40f36914e2925510cd8056d0b..4f8100e32769cf31c25f5dd849a18f5b77376090 100644 > --- a/drivers/gpu/drm/sun4i/sun4i_rgb.c > +++ b/drivers/gpu/drm/sun4i/sun4i_rgb.c > @@ -51,14 +51,6 @@ static int sun4i_rgb_get_modes(struct drm_connector *connector) > return drm_panel_get_modes(rgb->panel, connector); > } > > -/* > - * VESA DMT defines a tolerance of 0.5% on the pixel clock, while the > - * CVT spec reuses that tolerance in its examples, so it looks to be a > - * good default tolerance for the EDID-based modes. Define it to 5 per > - * mille to avoid floating point operations. > - */ > -#define SUN4I_RGB_DOTCLOCK_TOLERANCE_PER_MILLE 5 > - > static enum drm_mode_status sun4i_rgb_mode_valid(struct drm_encoder *crtc, > const struct drm_display_mode *mode) > { > @@ -67,8 +59,8 @@ static enum drm_mode_status sun4i_rgb_mode_valid(struct drm_encoder *crtc, > u32 hsync = mode->hsync_end - mode->hsync_start; > u32 vsync = mode->vsync_end - mode->vsync_start; > unsigned long long rate = mode->clock * 1000; > - unsigned long long lowest, highest; > unsigned long long rounded_rate; > + int ret; > > DRM_DEBUG_DRIVER("Validating modes...\n"); > > @@ -122,15 +114,9 @@ static enum drm_mode_status sun4i_rgb_mode_valid(struct drm_encoder *crtc, > tcon->dclk_max_div = 127; > rounded_rate = clk_round_rate(tcon->dclk, rate); > > - lowest = rate * (1000 - SUN4I_RGB_DOTCLOCK_TOLERANCE_PER_MILLE); > - do_div(lowest, 1000); > - if (rounded_rate < lowest) > - return MODE_CLOCK_LOW; > - > - highest = rate * (1000 + SUN4I_RGB_DOTCLOCK_TOLERANCE_PER_MILLE); > - do_div(highest, 1000); > - if (rounded_rate > highest) > - return MODE_CLOCK_HIGH; > + ret = drm_mode_validate_mode(mode, rounded_rate); > + if (ret) > + return ret; > > out: > DRM_DEBUG_DRIVER("Clock rate OK\n"); > > -- > 2.46.2 > >
diff --git a/drivers/gpu/drm/sun4i/sun4i_rgb.c b/drivers/gpu/drm/sun4i/sun4i_rgb.c index dfb6acc42f02efc40f36914e2925510cd8056d0b..4f8100e32769cf31c25f5dd849a18f5b77376090 100644 --- a/drivers/gpu/drm/sun4i/sun4i_rgb.c +++ b/drivers/gpu/drm/sun4i/sun4i_rgb.c @@ -51,14 +51,6 @@ static int sun4i_rgb_get_modes(struct drm_connector *connector) return drm_panel_get_modes(rgb->panel, connector); } -/* - * VESA DMT defines a tolerance of 0.5% on the pixel clock, while the - * CVT spec reuses that tolerance in its examples, so it looks to be a - * good default tolerance for the EDID-based modes. Define it to 5 per - * mille to avoid floating point operations. - */ -#define SUN4I_RGB_DOTCLOCK_TOLERANCE_PER_MILLE 5 - static enum drm_mode_status sun4i_rgb_mode_valid(struct drm_encoder *crtc, const struct drm_display_mode *mode) { @@ -67,8 +59,8 @@ static enum drm_mode_status sun4i_rgb_mode_valid(struct drm_encoder *crtc, u32 hsync = mode->hsync_end - mode->hsync_start; u32 vsync = mode->vsync_end - mode->vsync_start; unsigned long long rate = mode->clock * 1000; - unsigned long long lowest, highest; unsigned long long rounded_rate; + int ret; DRM_DEBUG_DRIVER("Validating modes...\n"); @@ -122,15 +114,9 @@ static enum drm_mode_status sun4i_rgb_mode_valid(struct drm_encoder *crtc, tcon->dclk_max_div = 127; rounded_rate = clk_round_rate(tcon->dclk, rate); - lowest = rate * (1000 - SUN4I_RGB_DOTCLOCK_TOLERANCE_PER_MILLE); - do_div(lowest, 1000); - if (rounded_rate < lowest) - return MODE_CLOCK_LOW; - - highest = rate * (1000 + SUN4I_RGB_DOTCLOCK_TOLERANCE_PER_MILLE); - do_div(highest, 1000); - if (rounded_rate > highest) - return MODE_CLOCK_HIGH; + ret = drm_mode_validate_mode(mode, rounded_rate); + if (ret) + return ret; out: DRM_DEBUG_DRIVER("Clock rate OK\n");
Use new helper function for HDMI mode validation Signed-off-by: Sean Nyekjaer <sean@geanix.com> --- drivers/gpu/drm/sun4i/sun4i_rgb.c | 22 ++++------------------ 1 file changed, 4 insertions(+), 18 deletions(-)