| Message ID | 20241126-qcs615-gpu-dt-v1-1-a87782976dad@quicinc.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Devicetree changes for QCS615's GPU | expand |
On 26/11/2024 15:06, Akhil P Oommen wrote: > A612 GPU requires an additional smmu_vote clock. Update the bindings to > reflect this. > > Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com> > --- > .../devicetree/bindings/display/msm/gpu.yaml | 28 ++++++++++++---------- > 1 file changed, 16 insertions(+), 12 deletions(-) > > diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml > index 6ddc72fd85b04537ea270754a897b4e7eb269641..201150d3151b55c26c95832d36f4e02f66060a25 100644 > --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml > +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml > @@ -187,6 +187,7 @@ allOf: > enum: > - qcom,adreno-610.0 > - qcom,adreno-619.1 > + - qcom,adreno-612.0 Keep things ordered. > then: > properties: > clocks: > @@ -195,18 +196,21 @@ allOf: > > clock-names: > items: > - - const: core > - description: GPU Core clock > - - const: iface > - description: GPU Interface clock > - - const: mem_iface > - description: GPU Memory Interface clock > - - const: alt_mem_iface > - description: GPU Alternative Memory Interface clock > - - const: gmu > - description: CX GMU clock > - - const: xo > - description: GPUCC clocksource clock > + anyOf: No, this makes everything total mess. Why xo now is allowed to be first clock? Drop and explain in commit msg why other devices now get smmu clock. BTW, I am pretty sure this breaks existing platforms. Best regards, Krzysztof
On 11/26/2024 7:36 PM, Akhil P Oommen wrote: > A612 GPU requires an additional smmu_vote clock. Update the bindings to > reflect this. > > Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com> > --- > .../devicetree/bindings/display/msm/gpu.yaml | 28 ++++++++++++---------- > 1 file changed, 16 insertions(+), 12 deletions(-) > > diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml > index 6ddc72fd85b04537ea270754a897b4e7eb269641..201150d3151b55c26c95832d36f4e02f66060a25 100644 > --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml > +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml > @@ -187,6 +187,7 @@ allOf: > enum: > - qcom,adreno-610.0 > - qcom,adreno-619.1 > + - qcom,adreno-612.0 > then: > properties: > clocks: > @@ -195,18 +196,21 @@ allOf: > > clock-names: > items: > - - const: core > - description: GPU Core clock > - - const: iface > - description: GPU Interface clock > - - const: mem_iface > - description: GPU Memory Interface clock > - - const: alt_mem_iface > - description: GPU Alternative Memory Interface clock > - - const: gmu > - description: CX GMU clock > - - const: xo > - description: GPUCC clocksource clock > + anyOf: > + - const: core > + description: GPU Core clock > + - const: iface > + description: GPU Interface clock > + - const: mem_iface > + description: GPU Memory Interface clock > + - const: alt_mem_iface > + description: GPU Alternative Memory Interface clock > + - const: gmu > + description: CX GMU clock > + - const: xo > + description: GPUCC clocksource clock > + - const: smmu_vote > + description: GPUCC clocksource clock Forgot to update the description. will fix. -Akhil > > reg-names: > minItems: 1 >
On 11/26/2024 7:42 PM, Krzysztof Kozlowski wrote: > On 26/11/2024 15:06, Akhil P Oommen wrote: >> A612 GPU requires an additional smmu_vote clock. Update the bindings to >> reflect this. >> >> Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com> >> --- >> .../devicetree/bindings/display/msm/gpu.yaml | 28 ++++++++++++---------- >> 1 file changed, 16 insertions(+), 12 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml >> index 6ddc72fd85b04537ea270754a897b4e7eb269641..201150d3151b55c26c95832d36f4e02f66060a25 100644 >> --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml >> +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml >> @@ -187,6 +187,7 @@ allOf: >> enum: >> - qcom,adreno-610.0 >> - qcom,adreno-619.1 >> + - qcom,adreno-612.0 > > Keep things ordered. Ack. > >> then: >> properties: >> clocks: >> @@ -195,18 +196,21 @@ allOf: >> >> clock-names: >> items: >> - - const: core >> - description: GPU Core clock >> - - const: iface >> - description: GPU Interface clock >> - - const: mem_iface >> - description: GPU Memory Interface clock >> - - const: alt_mem_iface >> - description: GPU Alternative Memory Interface clock >> - - const: gmu >> - description: CX GMU clock >> - - const: xo >> - description: GPUCC clocksource clock >> + anyOf: > > No, this makes everything total mess. Why xo now is allowed to be first > clock? > > Drop and explain in commit msg why other devices now get smmu clock. I thought it was okay to make this list a bit flexible. Btw, the other existing clock-names list for a5x and older gpus uses "anyOf". I suppose the suggestion is to add a separate clock-names list for A612 with strict ordering. Is that correct? -Akhil > > BTW, I am pretty sure this breaks existing platforms. > > Best regards, > Krzysztof
On 26/11/2024 16:24, Akhil P Oommen wrote: >> No, this makes everything total mess. Why xo now is allowed to be first >> clock? >> >> Drop and explain in commit msg why other devices now get smmu clock. > > I thought it was okay to make this list a bit flexible. Btw, the other > existing clock-names list for a5x and older gpus uses "anyOf". > > I suppose the suggestion is to add a separate clock-names list for A612 > with strict ordering. Is that correct? Yes Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml index 6ddc72fd85b04537ea270754a897b4e7eb269641..201150d3151b55c26c95832d36f4e02f66060a25 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml @@ -187,6 +187,7 @@ allOf: enum: - qcom,adreno-610.0 - qcom,adreno-619.1 + - qcom,adreno-612.0 then: properties: clocks: @@ -195,18 +196,21 @@ allOf: clock-names: items: - - const: core - description: GPU Core clock - - const: iface - description: GPU Interface clock - - const: mem_iface - description: GPU Memory Interface clock - - const: alt_mem_iface - description: GPU Alternative Memory Interface clock - - const: gmu - description: CX GMU clock - - const: xo - description: GPUCC clocksource clock + anyOf: + - const: core + description: GPU Core clock + - const: iface + description: GPU Interface clock + - const: mem_iface + description: GPU Memory Interface clock + - const: alt_mem_iface + description: GPU Alternative Memory Interface clock + - const: gmu + description: CX GMU clock + - const: xo + description: GPUCC clocksource clock + - const: smmu_vote + description: GPUCC clocksource clock reg-names: minItems: 1
A612 GPU requires an additional smmu_vote clock. Update the bindings to reflect this. Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com> --- .../devicetree/bindings/display/msm/gpu.yaml | 28 ++++++++++++---------- 1 file changed, 16 insertions(+), 12 deletions(-)