| Message ID | 20241126140003.74871-14-philmd@linaro.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | target/mips: Convert nanoMIPS LSA opcode to decodetree | expand |
On 11/26/24 07:59, Philippe Mathieu-Daudé wrote: > gen_li() is the trivial 'Load Immediate' instruction. > > Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> > --- > target/mips/tcg/translate.h | 1 + > target/mips/tcg/comput_translate.c | 21 +++++++++++++++++++++ > target/mips/tcg/meson.build | 1 + > 3 files changed, 23 insertions(+) > create mode 100644 target/mips/tcg/comput_translate.c Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/target/mips/tcg/translate.h b/target/mips/tcg/translate.h index 7fe34a1d891..222fa9e1e8b 100644 --- a/target/mips/tcg/translate.h +++ b/target/mips/tcg/translate.h @@ -168,6 +168,7 @@ void gen_store_fpr32(DisasContext *ctx, TCGv_i32 t, int reg); void gen_store_fpr64(DisasContext *ctx, TCGv_i64 t, int reg); int get_fp_bit(int cc); +void gen_li(DisasContext *ctx, int rd, int imm); void gen_lx(DisasContext *ctx, int rd, int base, int index, MemOp mop); void gen_ldxs(DisasContext *ctx, int base, int index, int rd); void gen_align(DisasContext *ctx, int wordsz, int rd, int rs, int rt, int bp); diff --git a/target/mips/tcg/comput_translate.c b/target/mips/tcg/comput_translate.c new file mode 100644 index 00000000000..3414cc079af --- /dev/null +++ b/target/mips/tcg/comput_translate.c @@ -0,0 +1,21 @@ +/* + * MIPS emulation for QEMU - computational translation routines + * + * Copyright (c) 2021 Philippe Mathieu-Daudé <f4bug@amsat.org> + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ + +#include "qemu/osdep.h" +#include "translate.h" + +/* logical instructions */ + +void gen_li(DisasContext *ctx, int rd, int imm) +{ + if (rd == 0) { + /* Treat as NOP. */ + return; + } + tcg_gen_movi_tl(cpu_gpr[rd], imm); +} diff --git a/target/mips/tcg/meson.build b/target/mips/tcg/meson.build index f674819e6a8..a46c13f3e75 100644 --- a/target/mips/tcg/meson.build +++ b/target/mips/tcg/meson.build @@ -18,6 +18,7 @@ gen = [ mips_ss.add(gen) mips_ss.add(files( + 'comput_translate.c', 'dsp_helper.c', 'exception.c', 'fpu_helper.c',
gen_li() is the trivial 'Load Immediate' instruction. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- target/mips/tcg/translate.h | 1 + target/mips/tcg/comput_translate.c | 21 +++++++++++++++++++++ target/mips/tcg/meson.build | 1 + 3 files changed, 23 insertions(+) create mode 100644 target/mips/tcg/comput_translate.c