@@ -287,4 +287,70 @@
#define IMX8MM_CLK_END 258
+#define IMX8MM_ANATOP_CLK_DUMMY 0
+#define IMX8MM_ANATOP_CLK_32K 1
+#define IMX8MM_ANATOP_CLK_24M 2
+#define IMX8MM_ANATOP_AUDIO_PLL1_REF_SEL 3
+#define IMX8MM_ANATOP_AUDIO_PLL2_REF_SEL 4
+#define IMX8MM_ANATOP_VIDEO_PLL_REF_SEL 5
+#define IMX8MM_ANATOP_DRAM_PLL_REF_SEL 6
+#define IMX8MM_ANATOP_GPU_PLL_REF_SEL 7
+#define IMX8MM_ANATOP_VPU_PLL_REF_SEL 8
+#define IMX8MM_ANATOP_ARM_PLL_REF_SEL 9
+#define IMX8MM_ANATOP_SYS_PLL3_REF_SEL 10
+#define IMX8MM_ANATOP_AUDIO_PLL1 11
+#define IMX8MM_ANATOP_AUDIO_PLL2 12
+#define IMX8MM_ANATOP_VIDEO_PLL 13
+#define IMX8MM_ANATOP_DRAM_PLL 14
+#define IMX8MM_ANATOP_GPU_PLL 15
+#define IMX8MM_ANATOP_VPU_PLL 16
+#define IMX8MM_ANATOP_ARM_PLL 17
+#define IMX8MM_ANATOP_SYS_PLL1 18
+#define IMX8MM_ANATOP_SYS_PLL2 19
+#define IMX8MM_ANATOP_SYS_PLL3 20
+#define IMX8MM_ANATOP_AUDIO_PLL1_BYPASS 21
+#define IMX8MM_ANATOP_AUDIO_PLL2_BYPASS 22
+#define IMX8MM_ANATOP_VIDEO_PLL_BYPASS 23
+#define IMX8MM_ANATOP_DRAM_PLL_BYPASS 24
+#define IMX8MM_ANATOP_GPU_PLL_BYPASS 25
+#define IMX8MM_ANATOP_VPU_PLL_BYPASS 26
+#define IMX8MM_ANATOP_ARM_PLL_BYPASS 27
+#define IMX8MM_ANATOP_SYS_PLL3_BYPASS 28
+#define IMX8MM_ANATOP_AUDIO_PLL1_OUT 29
+#define IMX8MM_ANATOP_AUDIO_PLL2_OUT 30
+#define IMX8MM_ANATOP_VIDEO_PLL_OUT 31
+#define IMX8MM_ANATOP_DRAM_PLL_OUT 32
+#define IMX8MM_ANATOP_GPU_PLL_OUT 33
+#define IMX8MM_ANATOP_VPU_PLL_OUT 34
+#define IMX8MM_ANATOP_ARM_PLL_OUT 35
+#define IMX8MM_ANATOP_SYS_PLL3_OUT 36
+#define IMX8MM_ANATOP_SYS_PLL1_OUT 37
+#define IMX8MM_ANATOP_SYS_PLL1_40M 38
+#define IMX8MM_ANATOP_SYS_PLL1_80M 39
+#define IMX8MM_ANATOP_SYS_PLL1_100M 40
+#define IMX8MM_ANATOP_SYS_PLL1_133M 41
+#define IMX8MM_ANATOP_SYS_PLL1_160M 42
+#define IMX8MM_ANATOP_SYS_PLL1_200M 43
+#define IMX8MM_ANATOP_SYS_PLL1_266M 44
+#define IMX8MM_ANATOP_SYS_PLL1_400M 45
+#define IMX8MM_ANATOP_SYS_PLL1_800M 46
+#define IMX8MM_ANATOP_SYS_PLL2_OUT 47
+#define IMX8MM_ANATOP_SYS_PLL2_50M 48
+#define IMX8MM_ANATOP_SYS_PLL2_100M 49
+#define IMX8MM_ANATOP_SYS_PLL2_125M 50
+#define IMX8MM_ANATOP_SYS_PLL2_166M 51
+#define IMX8MM_ANATOP_SYS_PLL2_200M 52
+#define IMX8MM_ANATOP_SYS_PLL2_250M 53
+#define IMX8MM_ANATOP_SYS_PLL2_333M 54
+#define IMX8MM_ANATOP_SYS_PLL2_500M 55
+#define IMX8MM_ANATOP_SYS_PLL2_1000M 56
+#define IMX8MM_ANATOP_CLK_CLKOUT1_SEL 57
+#define IMX8MM_ANATOP_CLK_CLKOUT1_DIV 58
+#define IMX8MM_ANATOP_CLK_CLKOUT1 59
+#define IMX8MM_ANATOP_CLK_CLKOUT2_SEL 60
+#define IMX8MM_ANATOP_CLK_CLKOUT2_DIV 61
+#define IMX8MM_ANATOP_CLK_CLKOUT2 62
+
+#define IMX8MM_ANATOP_CLK_END 63
+
#endif
Add the bindings definitions for the anatop node. The patch is preparatory for future developments. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> - Added in v4 --- (no changes since v1) include/dt-bindings/clock/imx8mm-clock.h | 66 ++++++++++++++++++++++++ 1 file changed, 66 insertions(+)