| Message ID | 20241202131347.498124-12-peter.maydell@linaro.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | fpu: Remove pickNaNMulAdd, default-NaN ifdefs | expand |
On 12/2/24 07:13, Peter Maydell wrote: > Set the FloatInfZeroNaNRule explicitly for the x86 target. > > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> > Reviewed-by: Richard Henderson <richard.henderson@linaro.org> > --- > v1->v2: Update the comment to give the info from the x86 > spec rather than a TODO comment saying we need to check it... > --- > target/i386/tcg/fpu_helper.c | 7 +++++++ > fpu/softfloat-specialize.c.inc | 2 +- > 2 files changed, 8 insertions(+), 1 deletion(-) > > diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c > index 53b49bb2977..a98b4f67ff0 100644 > --- a/target/i386/tcg/fpu_helper.c > +++ b/target/i386/tcg/fpu_helper.c > @@ -173,6 +173,13 @@ void cpu_init_fp_statuses(CPUX86State *env) > */ > set_float_2nan_prop_rule(float_2nan_prop_x87, &env->mmx_status); > set_float_2nan_prop_rule(float_2nan_prop_x87, &env->sse_status); > + /* > + * Only SSE has multiply-add instructions. In the SDM Section 14.5.2 > + * "Fused-Multiply-ADD (FMA) Numeric Behavior" the NaN handling is > + * specified -- for 0 * inf + NaN the input NaN is selected, and if > + * there are multiple input NaNs athey are selected in the order a, b, c. "athey" r~
diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c index 53b49bb2977..a98b4f67ff0 100644 --- a/target/i386/tcg/fpu_helper.c +++ b/target/i386/tcg/fpu_helper.c @@ -173,6 +173,13 @@ void cpu_init_fp_statuses(CPUX86State *env) */ set_float_2nan_prop_rule(float_2nan_prop_x87, &env->mmx_status); set_float_2nan_prop_rule(float_2nan_prop_x87, &env->sse_status); + /* + * Only SSE has multiply-add instructions. In the SDM Section 14.5.2 + * "Fused-Multiply-ADD (FMA) Numeric Behavior" the NaN handling is + * specified -- for 0 * inf + NaN the input NaN is selected, and if + * there are multiple input NaNs athey are selected in the order a, b, c. + */ + set_float_infzeronan_rule(float_infzeronan_dnan_never, &env->sse_status); } static inline uint8_t save_exception_flags(CPUX86State *env) diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc index 3062d19402d..ad4f7096d09 100644 --- a/fpu/softfloat-specialize.c.inc +++ b/fpu/softfloat-specialize.c.inc @@ -490,7 +490,7 @@ static int pickNaNMulAdd(FloatClass a_cls, FloatClass b_cls, FloatClass c_cls, * Temporarily fall back to ifdef ladder */ #if defined(TARGET_HPPA) || \ - defined(TARGET_I386) || defined(TARGET_LOONGARCH) + defined(TARGET_LOONGARCH) /* * For LoongArch systems that conform to IEEE754-2008, the (inf,zero,nan) * case sets InvalidOp and returns the input value 'c'