diff mbox series

[v2,for-10.0,53/54] target/tricore: Set default NaN pattern explicitly

Message ID 20241202131347.498124-54-peter.maydell@linaro.org (mailing list archive)
State New
Headers show
Series fpu: Remove pickNaNMulAdd, default-NaN ifdefs | expand

Commit Message

Peter Maydell Dec. 2, 2024, 1:13 p.m. UTC 
Set the default NaN pattern explicitly for tricore.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/tricore/helper.c | 2 ++
 1 file changed, 2 insertions(+)

Comments

Richard Henderson Dec. 2, 2024, 5:39 p.m. UTC | #1 
On 12/2/24 07:13, Peter Maydell wrote:
> Set the default NaN pattern explicitly for tricore.
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>   target/tricore/helper.c | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/target/tricore/helper.c b/target/tricore/helper.c
> index 7014255f77c..e8b0ec51611 100644
> --- a/target/tricore/helper.c
> +++ b/target/tricore/helper.c
> @@ -117,6 +117,8 @@ void fpu_set_state(CPUTriCoreState *env)
>       set_flush_to_zero(1, &env->fp_status);
>       set_float_detect_tininess(float_tininess_before_rounding, &env->fp_status);
>       set_default_nan_mode(1, &env->fp_status);
> +    /* Default NaN pattern: sign bit clear, frac msb set */
> +    set_float_default_nan_pattern(0b01000000, &env->fp_status);
>   }
>   
>   uint32_t psw_read(CPUTriCoreState *env)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~
diff mbox series

Patch

diff --git a/target/tricore/helper.c b/target/tricore/helper.c
index 7014255f77c..e8b0ec51611 100644
--- a/target/tricore/helper.c
+++ b/target/tricore/helper.c
@@ -117,6 +117,8 @@  void fpu_set_state(CPUTriCoreState *env)
     set_flush_to_zero(1, &env->fp_status);
     set_float_detect_tininess(float_tininess_before_rounding, &env->fp_status);
     set_default_nan_mode(1, &env->fp_status);
+    /* Default NaN pattern: sign bit clear, frac msb set */
+    set_float_default_nan_pattern(0b01000000, &env->fp_status);
 }
 
 uint32_t psw_read(CPUTriCoreState *env)