| Message ID | 20241203-rcar-gh-dsi-v1-4-738ae1a95d2a@ideasonboard.com (mailing list archive) |
|---|---|
| State | New |
| Delegated to: | Kieran Bingham |
| Headers | show |
| Series | drm: Add DSI/DP support for Renesas r8a779h0 V4M and grey-hawk board | expand |
Hi Tomi, Thank you for the patch. On Tue, Dec 03, 2024 at 10:01:38AM +0200, Tomi Valkeinen wrote: > From: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com> > > The driver checks for bit 16 (using CLOCKSET1_LOCK define) in CLOCKSET1 > register when waiting for the PPI clock. However, the right bit to check > is bit 17 (CLOCKSET1_LOCK_PHY define). Not only that, but there's > nothing in the documents for bit 16 for V3U nor V4H. > > So, fix the check to use bit 17, and drop the define for bit 16. > > Fixes: 155358310f01 ("drm: rcar-du: Add R-Car DSI driver") > Fixes: 11696c5e8924 ("drm: Place Renesas drivers in a separate dir") Should this have CC: stable ? > Signed-off-by: Tomi Valkeiben <tomi.valkeinen+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> > --- > drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c | 2 +- > drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h | 1 - > 2 files changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c > index 2dba7c5ffd2c..92f4261305bd 100644 > --- a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c > +++ b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c > @@ -587,7 +587,7 @@ static int rcar_mipi_dsi_startup(struct rcar_mipi_dsi *dsi, > for (timeout = 10; timeout > 0; --timeout) { > if ((rcar_mipi_dsi_read(dsi, PPICLSR) & PPICLSR_STPST) && > (rcar_mipi_dsi_read(dsi, PPIDLSR) & PPIDLSR_STPST) && > - (rcar_mipi_dsi_read(dsi, CLOCKSET1) & CLOCKSET1_LOCK)) > + (rcar_mipi_dsi_read(dsi, CLOCKSET1) & CLOCKSET1_LOCK_PHY)) > break; > > usleep_range(1000, 2000); > diff --git a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h > index f8114d11f2d1..a6b276f1d6ee 100644 > --- a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h > +++ b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h > @@ -142,7 +142,6 @@ > > #define CLOCKSET1 0x101c > #define CLOCKSET1_LOCK_PHY (1 << 17) > -#define CLOCKSET1_LOCK (1 << 16) > #define CLOCKSET1_CLKSEL (1 << 8) > #define CLOCKSET1_CLKINSEL_EXTAL (0 << 2) > #define CLOCKSET1_CLKINSEL_DIG (1 << 2)
diff --git a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c index 2dba7c5ffd2c..92f4261305bd 100644 --- a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c +++ b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c @@ -587,7 +587,7 @@ static int rcar_mipi_dsi_startup(struct rcar_mipi_dsi *dsi, for (timeout = 10; timeout > 0; --timeout) { if ((rcar_mipi_dsi_read(dsi, PPICLSR) & PPICLSR_STPST) && (rcar_mipi_dsi_read(dsi, PPIDLSR) & PPIDLSR_STPST) && - (rcar_mipi_dsi_read(dsi, CLOCKSET1) & CLOCKSET1_LOCK)) + (rcar_mipi_dsi_read(dsi, CLOCKSET1) & CLOCKSET1_LOCK_PHY)) break; usleep_range(1000, 2000); diff --git a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h index f8114d11f2d1..a6b276f1d6ee 100644 --- a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h +++ b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h @@ -142,7 +142,6 @@ #define CLOCKSET1 0x101c #define CLOCKSET1_LOCK_PHY (1 << 17) -#define CLOCKSET1_LOCK (1 << 16) #define CLOCKSET1_CLKSEL (1 << 8) #define CLOCKSET1_CLKINSEL_EXTAL (0 << 2) #define CLOCKSET1_CLKINSEL_DIG (1 << 2)