Message ID | 20241205-dp_mst-v1-20-f8618d42a99a@quicinc.com (mailing list archive) |
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Fri, 06 Dec 2024 04:32:36 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4B64WZom022117 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 6 Dec 2024 04:32:35 GMT Received: from abhinavk-linux1.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 5 Dec 2024 20:32:35 -0800 From: Abhinav Kumar <quic_abhinavk@quicinc.com> Date: Thu, 5 Dec 2024 20:31:51 -0800 Subject: [PATCH 20/45] drm/msm/dp: no need to update tu calculation for mst Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: <linux-arm-msm.vger.kernel.org> List-Subscribe: <mailto:linux-arm-msm+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-arm-msm+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20241205-dp_mst-v1-20-f8618d42a99a@quicinc.com> References: <20241205-dp_mst-v1-0-f8618d42a99a@quicinc.com> In-Reply-To: <20241205-dp_mst-v1-0-f8618d42a99a@quicinc.com> To: Rob Clark <robdclark@gmail.com>, Dmitry Baryshkov <dmitry.baryshkov@linaro.org>, Sean Paul <sean@poorly.run>, Marijn Suijten <marijn.suijten@somainline.org>, David Airlie <airlied@gmail.com>, "Simona Vetter" <simona@ffwll.ch>, Stephen Boyd <swboyd@chromium.org>, "Chandan Uddaraju" <chandanu@codeaurora.org>, Guenter Roeck <groeck@chromium.org>, Kuogee Hsieh <quic_khsieh@quicinc.com>, Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konradybcio@kernel.org>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org> CC: Vara Reddy <quic_varar@quicinc.com>, Rob Clark <robdclark@chromium.org>, Tanmay Shah <tanmay@codeaurora.org>, <linux-arm-msm@vger.kernel.org>, <dri-devel@lists.freedesktop.org>, <freedreno@lists.freedesktop.org>, <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, Jessica Zhang <quic_jesszhan@quicinc.com>, Laurent Pinchart <laurent.pinchart@ideasonboard.com>, Abhinav Kumar <quic_abhinavk@quicinc.com> X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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Series |
drm/msm/dp: Add MST support for MSM chipsets
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On Thu, Dec 05, 2024 at 08:31:51PM -0800, Abhinav Kumar wrote: > DP stream is transmitted in transfer units only for SST > case there is no need to calculate and program TU parameters > for MST case. Skip the TU programming for MST cases. > > Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> > --- > drivers/gpu/drm/msm/dp/dp_ctrl.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c index 3839f1e8e1aeb2a14a7f59c546693141a0df6323..1c313cf33f398dffc2ad349d7d1bc995fb4b45b3 100644 --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c @@ -2060,7 +2060,8 @@ int msm_dp_ctrl_on_stream(struct msm_dp_ctrl *msm_dp_ctrl, struct msm_dp_panel * pixel_rate_orig, msm_dp_panel->msm_dp_mode.out_fmt_is_yuv_420); - msm_dp_ctrl_setup_tr_unit(ctrl); + if (!ctrl->mst_active) + msm_dp_ctrl_setup_tr_unit(ctrl); msm_dp_catalog_ctrl_state_ctrl(ctrl->catalog, DP_STATE_CTRL_SEND_VIDEO);
DP stream is transmitted in transfer units only for SST case there is no need to calculate and program TU parameters for MST case. Skip the TU programming for MST cases. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> --- drivers/gpu/drm/msm/dp/dp_ctrl.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)