| Message ID | 20241205-dp_mst-v1-15-f8618d42a99a@quicinc.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | drm/msm/dp: Add MST support for MSM chipsets | expand |
On Thu, Dec 05, 2024 at 08:31:46PM -0800, Abhinav Kumar wrote: > Convert dp_display_set_mode() to use the dp_panel passed to it > as an argument rather than the cached one in dp_display_private. Why? > > Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> > --- > drivers/gpu/drm/msm/dp/dp_display.c | 60 ++++++++++++++++++------------------- > 1 file changed, 30 insertions(+), 30 deletions(-) > > diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c > index b506159191184a2a2c83d0735260ac040a33be98..5fa6c003cf6c51eae77573549a555a00dc33f476 100644 > --- a/drivers/gpu/drm/msm/dp/dp_display.c > +++ b/drivers/gpu/drm/msm/dp/dp_display.c > @@ -798,16 +798,38 @@ static int msm_dp_init_sub_modules(struct msm_dp_display_private *dp) > } > > static int msm_dp_display_set_mode(struct msm_dp *msm_dp_display, > - struct msm_dp_display_mode *mode) > + const struct drm_display_mode *adjusted_mode, > + struct msm_dp_panel *msm_dp_panel) > { > - struct msm_dp_display_private *dp; > + struct msm_dp_display_mode msm_dp_mode; > > - dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); > + memset(&msm_dp_mode, 0x0, sizeof(struct msm_dp_display_mode)); > + > + if (msm_dp_display_check_video_test(msm_dp_display)) > + msm_dp_mode.bpp = msm_dp_display_get_test_bpp(msm_dp_display); > + else /* Default num_components per pixel = 3 */ > + msm_dp_mode.bpp = msm_dp_panel->connector->display_info.bpc * 3; > + > + if (!msm_dp_mode.bpp) > + msm_dp_mode.bpp = 24; /* Default bpp */ > + > + drm_mode_copy(&msm_dp_mode.drm_mode, adjusted_mode); > + > + msm_dp_mode.v_active_low = > + !!(msm_dp_mode.drm_mode.flags & DRM_MODE_FLAG_NVSYNC); > + > + msm_dp_mode.h_active_low = > + !!(msm_dp_mode.drm_mode.flags & DRM_MODE_FLAG_NHSYNC); > + > + msm_dp_mode.out_fmt_is_yuv_420 = > + drm_mode_is_420_only(&msm_dp_display->connector->display_info, adjusted_mode) && > + msm_dp_panel->vsc_sdp_supported; > + > + drm_mode_copy(&msm_dp_panel->msm_dp_mode.drm_mode, &msm_dp_mode.drm_mode); > + msm_dp_panel->msm_dp_mode.bpp = msm_dp_mode.bpp; > + msm_dp_panel->msm_dp_mode.out_fmt_is_yuv_420 = msm_dp_mode.out_fmt_is_yuv_420; > + msm_dp_panel_init_panel_info(msm_dp_panel); > > - drm_mode_copy(&dp->panel->msm_dp_mode.drm_mode, &mode->drm_mode); > - dp->panel->msm_dp_mode.bpp = mode->bpp; > - dp->panel->msm_dp_mode.out_fmt_is_yuv_420 = mode->out_fmt_is_yuv_420; > - msm_dp_panel_init_panel_info(dp->panel); > return 0; > } > > @@ -1662,34 +1684,12 @@ void msm_dp_display_mode_set(struct msm_dp *dp, > { > struct msm_dp_display_private *msm_dp_display; > struct msm_dp_panel *msm_dp_panel; > - struct msm_dp_display_mode msm_dp_mode; > > msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); > msm_dp_panel = msm_dp_display->panel; > > - memset(&msm_dp_mode, 0x0, sizeof(struct msm_dp_display_mode)); > - > - if (msm_dp_display_check_video_test(dp)) > - msm_dp_mode.bpp = msm_dp_display_get_test_bpp(dp); > - else /* Default num_components per pixel = 3 */ > - msm_dp_mode.bpp = dp->connector->display_info.bpc * 3; > - > - if (!msm_dp_mode.bpp) > - msm_dp_mode.bpp = 24; /* Default bpp */ > - > - drm_mode_copy(&msm_dp_mode.drm_mode, adjusted_mode); > - > - msm_dp_mode.v_active_low = > - !!(msm_dp_mode.drm_mode.flags & DRM_MODE_FLAG_NVSYNC); > - > - msm_dp_mode.h_active_low = > - !!(msm_dp_mode.drm_mode.flags & DRM_MODE_FLAG_NHSYNC); > - > - msm_dp_mode.out_fmt_is_yuv_420 = > - drm_mode_is_420_only(&dp->connector->display_info, adjusted_mode) && > - msm_dp_panel->vsc_sdp_supported; > > - msm_dp_display_set_mode(dp, &msm_dp_mode); > + msm_dp_display_set_mode(dp, adjusted_mode, msm_dp_panel); > > /* populate wide_bus_support to different layers */ > msm_dp_display->ctrl->wide_bus_en = > > -- > 2.34.1 >
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index b506159191184a2a2c83d0735260ac040a33be98..5fa6c003cf6c51eae77573549a555a00dc33f476 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -798,16 +798,38 @@ static int msm_dp_init_sub_modules(struct msm_dp_display_private *dp) } static int msm_dp_display_set_mode(struct msm_dp *msm_dp_display, - struct msm_dp_display_mode *mode) + const struct drm_display_mode *adjusted_mode, + struct msm_dp_panel *msm_dp_panel) { - struct msm_dp_display_private *dp; + struct msm_dp_display_mode msm_dp_mode; - dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); + memset(&msm_dp_mode, 0x0, sizeof(struct msm_dp_display_mode)); + + if (msm_dp_display_check_video_test(msm_dp_display)) + msm_dp_mode.bpp = msm_dp_display_get_test_bpp(msm_dp_display); + else /* Default num_components per pixel = 3 */ + msm_dp_mode.bpp = msm_dp_panel->connector->display_info.bpc * 3; + + if (!msm_dp_mode.bpp) + msm_dp_mode.bpp = 24; /* Default bpp */ + + drm_mode_copy(&msm_dp_mode.drm_mode, adjusted_mode); + + msm_dp_mode.v_active_low = + !!(msm_dp_mode.drm_mode.flags & DRM_MODE_FLAG_NVSYNC); + + msm_dp_mode.h_active_low = + !!(msm_dp_mode.drm_mode.flags & DRM_MODE_FLAG_NHSYNC); + + msm_dp_mode.out_fmt_is_yuv_420 = + drm_mode_is_420_only(&msm_dp_display->connector->display_info, adjusted_mode) && + msm_dp_panel->vsc_sdp_supported; + + drm_mode_copy(&msm_dp_panel->msm_dp_mode.drm_mode, &msm_dp_mode.drm_mode); + msm_dp_panel->msm_dp_mode.bpp = msm_dp_mode.bpp; + msm_dp_panel->msm_dp_mode.out_fmt_is_yuv_420 = msm_dp_mode.out_fmt_is_yuv_420; + msm_dp_panel_init_panel_info(msm_dp_panel); - drm_mode_copy(&dp->panel->msm_dp_mode.drm_mode, &mode->drm_mode); - dp->panel->msm_dp_mode.bpp = mode->bpp; - dp->panel->msm_dp_mode.out_fmt_is_yuv_420 = mode->out_fmt_is_yuv_420; - msm_dp_panel_init_panel_info(dp->panel); return 0; } @@ -1662,34 +1684,12 @@ void msm_dp_display_mode_set(struct msm_dp *dp, { struct msm_dp_display_private *msm_dp_display; struct msm_dp_panel *msm_dp_panel; - struct msm_dp_display_mode msm_dp_mode; msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display); msm_dp_panel = msm_dp_display->panel; - memset(&msm_dp_mode, 0x0, sizeof(struct msm_dp_display_mode)); - - if (msm_dp_display_check_video_test(dp)) - msm_dp_mode.bpp = msm_dp_display_get_test_bpp(dp); - else /* Default num_components per pixel = 3 */ - msm_dp_mode.bpp = dp->connector->display_info.bpc * 3; - - if (!msm_dp_mode.bpp) - msm_dp_mode.bpp = 24; /* Default bpp */ - - drm_mode_copy(&msm_dp_mode.drm_mode, adjusted_mode); - - msm_dp_mode.v_active_low = - !!(msm_dp_mode.drm_mode.flags & DRM_MODE_FLAG_NVSYNC); - - msm_dp_mode.h_active_low = - !!(msm_dp_mode.drm_mode.flags & DRM_MODE_FLAG_NHSYNC); - - msm_dp_mode.out_fmt_is_yuv_420 = - drm_mode_is_420_only(&dp->connector->display_info, adjusted_mode) && - msm_dp_panel->vsc_sdp_supported; - msm_dp_display_set_mode(dp, &msm_dp_mode); + msm_dp_display_set_mode(dp, adjusted_mode, msm_dp_panel); /* populate wide_bus_support to different layers */ msm_dp_display->ctrl->wide_bus_en =
Convert dp_display_set_mode() to use the dp_panel passed to it as an argument rather than the cached one in dp_display_private. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> --- drivers/gpu/drm/msm/dp/dp_display.c | 60 ++++++++++++++++++------------------- 1 file changed, 30 insertions(+), 30 deletions(-)