diff mbox series

[RFC,v2,03/15] s390x/cpumodel: add msa12 changes

Message ID 20241206122751.189721-4-brueckner@linux.ibm.com (mailing list archive)
State New
Headers show
Series KVM: s390: CPU model for gen17 | expand

Commit Message

Hendrik Brueckner Dec. 6, 2024, 12:27 p.m. UTC 
MSA12 changes the KIMD/KLMD instruction format for SHA3/SHAKE.

Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by: Christian Borntraeger <borntraeger@linux.ibm.com>
---
 target/s390x/cpu_features.c         | 1 +
 target/s390x/cpu_features_def.h.inc | 1 +
 target/s390x/gen-features.c         | 8 ++++++++
 3 files changed, 10 insertions(+)

Comments

Janosch Frank Dec. 9, 2024, 2:48 p.m. UTC | #1 
On 12/6/24 1:27 PM, Hendrik Brueckner wrote:
> MSA12 changes the KIMD/KLMD instruction format for SHA3/SHAKE.
> 
> Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
> Reviewed-by: Christian Borntraeger <borntraeger@linux.ibm.com>

MSA6 is a prereq, no?
Hendrik Brueckner Dec. 9, 2024, 3:24 p.m. UTC | #2 
On Mon, Dec 09, 2024 at 03:48:11PM +0100, Janosch Frank wrote:
> On 12/6/24 1:27 PM, Hendrik Brueckner wrote:
> > MSA12 changes the KIMD/KLMD instruction format for SHA3/SHAKE.
> > 
> > Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
> > Reviewed-by: Christian Borntraeger <borntraeger@linux.ibm.com>
> 
> MSA6 is a prereq, no?

MSA6 is the prereq. However, there is no explicit feature definition
for the MSA_EXT_6 due to no STFLE and subfunctions only.  The only
way would be to pick one or more / all MSA6 subfunctions for which
there is a feature defined...
Janosch Frank Dec. 9, 2024, 3:45 p.m. UTC | #3 
On 12/9/24 4:24 PM, Hendrik Brueckner wrote:
> On Mon, Dec 09, 2024 at 03:48:11PM +0100, Janosch Frank wrote:
>> On 12/6/24 1:27 PM, Hendrik Brueckner wrote:
>>> MSA12 changes the KIMD/KLMD instruction format for SHA3/SHAKE.
>>>
>>> Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
>>> Reviewed-by: Christian Borntraeger <borntraeger@linux.ibm.com>
>>
>> MSA6 is a prereq, no?
> 
> MSA6 is the prereq. However, there is no explicit feature definition
> for the MSA_EXT_6 due to no STFLE and subfunctions only.  The only
> way would be to pick one or more / all MSA6 subfunctions for which
> there is a feature defined...

Which you did for MSA11, no?

I'm not saying that subfunc handling is great :)
Hendrik Brueckner Dec. 9, 2024, 3:54 p.m. UTC | #4 
On Mon, Dec 09, 2024 at 04:45:25PM +0100, Janosch Frank wrote:
> On 12/9/24 4:24 PM, Hendrik Brueckner wrote:
> > On Mon, Dec 09, 2024 at 03:48:11PM +0100, Janosch Frank wrote:
> > > On 12/6/24 1:27 PM, Hendrik Brueckner wrote:
> > > > MSA12 changes the KIMD/KLMD instruction format for SHA3/SHAKE.
> > > > 
> > > > Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
> > > > Reviewed-by: Christian Borntraeger <borntraeger@linux.ibm.com>
> > > 
> > > MSA6 is a prereq, no?
> > 
> > MSA6 is the prereq. However, there is no explicit feature definition
> > for the MSA_EXT_6 due to no STFLE and subfunctions only.  The only
> > way would be to pick one or more / all MSA6 subfunctions for which
> > there is a feature defined...
> 
> Which you did for MSA11, no?

The other way around.

Here: MSA_EXT_12 would check/have a dependency on all(?) subfuncs
introduced with MSA_EXT_6.

> 
> I'm not saying that subfunc handling is great :)

Let me have a look which functions come with MSA_6 related to KIMD/KLMD.

Would it be OK to have those checks as a separate patch so that cpu
model in general is not blocked?
Janosch Frank Dec. 10, 2024, 7:45 a.m. UTC | #5 
On 12/9/24 4:54 PM, Hendrik Brueckner wrote:
> On Mon, Dec 09, 2024 at 04:45:25PM +0100, Janosch Frank wrote:
>> On 12/9/24 4:24 PM, Hendrik Brueckner wrote:
>>> On Mon, Dec 09, 2024 at 03:48:11PM +0100, Janosch Frank wrote:
>>>> On 12/6/24 1:27 PM, Hendrik Brueckner wrote:
>>>>> MSA12 changes the KIMD/KLMD instruction format for SHA3/SHAKE.
>>>>>
>>>>> Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
>>>>> Reviewed-by: Christian Borntraeger <borntraeger@linux.ibm.com>
>>>>
>>>> MSA6 is a prereq, no?
>>>
>>> MSA6 is the prereq. However, there is no explicit feature definition
>>> for the MSA_EXT_6 due to no STFLE and subfunctions only.  The only
>>> way would be to pick one or more / all MSA6 subfunctions for which
>>> there is a feature defined...
>>
>> Which you did for MSA11, no?
> 
> The other way around.
> 
> Here: MSA_EXT_12 would check/have a dependency on all(?) subfuncs
> introduced with MSA_EXT_6.
> 
>>
>> I'm not saying that subfunc handling is great :)
> 
> Let me have a look which functions come with MSA_6 related to KIMD/KLMD.
> 
> Would it be OK to have those checks as a separate patch so that cpu
> model in general is not blocked?

Of course, I mostly want this question being answered in general.
diff mbox series

Patch

diff --git a/target/s390x/cpu_features.c b/target/s390x/cpu_features.c
index 36930feccd..0e0b37ab95 100644
--- a/target/s390x/cpu_features.c
+++ b/target/s390x/cpu_features.c
@@ -256,6 +256,7 @@  static S390FeatGroupDef s390_feature_groups[] = {
     FEAT_GROUP_INIT("msa10_pckmo", MSA_EXT_10_PCKMO, "Message-security-assist-extension 10 PCKMO subfunctions"),
     FEAT_GROUP_INIT("msa11", MSA_EXT_11, "Message-security-assist-extension 11 facility"),
     FEAT_GROUP_INIT("msa11_pckmo", MSA_EXT_11_PCKMO, "Message-security-assist-extension 11 PCKMO subfunctions"),
+    FEAT_GROUP_INIT("msa12", MSA_EXT_12, "Message-security-assist-extension 12 facility"),
     FEAT_GROUP_INIT("mepochptff", MULTIPLE_EPOCH_PTFF, "PTFF enhancements introduced with Multiple-epoch facility"),
     FEAT_GROUP_INIT("esort", ENH_SORT, "Enhanced-sort facility"),
     FEAT_GROUP_INIT("deflate", DEFLATE_CONVERSION, "Deflate-conversion facility"),
diff --git a/target/s390x/cpu_features_def.h.inc b/target/s390x/cpu_features_def.h.inc
index 15ea51fc54..2e5dc96984 100644
--- a/target/s390x/cpu_features_def.h.inc
+++ b/target/s390x/cpu_features_def.h.inc
@@ -90,6 +90,7 @@  DEF_FEAT(EDAT_2, "edat2", STFL, 78, "Enhanced-DAT facility 2")
 DEF_FEAT(DFP_PACKED_CONVERSION, "dfppc", STFL, 80, "Decimal-floating-point packed-conversion facility")
 DEF_FEAT(PPA15, "ppa15", STFL, 81, "PPA15 is installed")
 DEF_FEAT(BPB, "bpb", STFL, 82, "Branch prediction blocking")
+DEF_FEAT(MSA_EXT_12, "msa12-base", STFL, 86, "Message-security-assist-extension-12 facility (excluding subfunctions)")
 DEF_FEAT(VECTOR, "vx", STFL, 129, "Vector facility")
 DEF_FEAT(INSTRUCTION_EXEC_PROT, "iep", STFL, 130, "Instruction-execution-protection facility")
 DEF_FEAT(SIDE_EFFECT_ACCESS_ESOP2, "sea_esop2", STFL, 131, "Side-effect-access facility and Enhanced-suppression-on-protection facility 2")
diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c
index d6305f945a..ab9ad51d5e 100644
--- a/target/s390x/gen-features.c
+++ b/target/s390x/gen-features.c
@@ -270,6 +270,9 @@ 
     S390_FEAT_PCKMO_HMAC_512, \
     S390_FEAT_PCKMO_HMAC_1024
 
+#define S390_FEAT_GROUP_MSA_EXT_12 \
+    S390_FEAT_MSA_EXT_12
+
 #define S390_FEAT_GROUP_ENH_SORT \
     S390_FEAT_ESORT_BASE, \
     S390_FEAT_SORTL_SFLR, \
@@ -339,6 +342,10 @@  static uint16_t group_MSA_EXT_11[] = {
     S390_FEAT_GROUP_MSA_EXT_11,
 };
 
+static uint16_t group_MSA_EXT_12[] = {
+    S390_FEAT_GROUP_MSA_EXT_12,
+};
+
 static uint16_t group_MSA_EXT_9_PCKMO[] = {
     S390_FEAT_GROUP_MSA_EXT_9_PCKMO,
 };
@@ -902,6 +909,7 @@  static FeatGroupDefSpec FeatGroupDef[] = {
     FEAT_GROUP_INITIALIZER(MSA_EXT_10_PCKMO),
     FEAT_GROUP_INITIALIZER(MSA_EXT_11),
     FEAT_GROUP_INITIALIZER(MSA_EXT_11_PCKMO),
+    FEAT_GROUP_INITIALIZER(MSA_EXT_12),
     FEAT_GROUP_INITIALIZER(MULTIPLE_EPOCH_PTFF),
     FEAT_GROUP_INITIALIZER(ENH_SORT),
     FEAT_GROUP_INITIALIZER(DEFLATE_CONVERSION),