| Message ID | 20241212-preset_v2-v2-0-210430fbcd8a@oss.qualcomm.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | PCI: dwc: Add support for configuring lane equalization presets | expand |
Please ignore this series it has wrong patches I will send new series to fix this. - Krishna Chaitanya. On 12/12/2024 4:02 PM, Krishna Chaitanya Chundru wrote: > PCIe equalization presets are predefined settings used to optimize > signal integrity by compensating for signal loss and distortion in > high-speed data transmission. > > As per PCIe spec 6.0.1 revision section 8.3.3.3 & 4.2.4 for data rates > of 8.0 GT/s, 16.0 GT/s, 32.0 GT/s, and 64.0 GT/s, there is a way to > configure lane equalization presets for each lane to enhance the PCIe > link reliability. Each preset value represents a different combination > of pre-shoot and de-emphasis values. For each data rate, different > registers are defined: for 8.0 GT/s, registers are defined in section > 7.7.3.4; for 16.0 GT/s, in section 7.7.5.9, etc. The 8.0 GT/s rate has > an extra receiver preset hint, requiring 16 bits per lane, while the > remaining data rates use 8 bits per lane. > > Based on the number of lanes and the supported data rate, read the > device tree property and stores in the presets structure. > > Based upon the lane width and supported data rate update lane > equalization registers. > > This patch depends on the this dt binding pull request: https://github.com/devicetree-org/dt-schema/pull/146 > > Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> > --- > Changes in v2: > - Fix the kernel test robot error > - As suggested by konrad use for loop and read "eq-presets-%ugts", (8 << i) > - Link to v1: https://lore.kernel.org/r/20241116-presets-v1-0-878a837a4fee@quicinc.com > > --- > Krishna chaitanya chundru (4): > arm64: dts: qcom: x1e80100: Add PCIe lane equalization preset properties > PCI: of: Add API to retrieve equalization presets from device tree > PCI: dwc: Improve handling of PCIe lane configuration > PCI: dwc: Add support for new pci function op > > arch/arm64/boot/dts/qcom/x1e80100.dtsi | 8 ++++ > drivers/pci/controller/dwc/pcie-designware-host.c | 21 +++++++++++ > drivers/pci/controller/dwc/pcie-designware.c | 14 ++++++- > drivers/pci/controller/dwc/pcie-designware.h | 1 + > drivers/pci/of.c | 45 +++++++++++++++++++++++ > drivers/pci/pci.h | 17 ++++++++- > 6 files changed, 103 insertions(+), 3 deletions(-) > --- > base-commit: 87d6aab2389e5ce0197d8257d5f8ee965a67c4cd > change-id: 20241212-preset_v2-549b7acda9b7 > > Best regards,
On 12/12/2024 11:40, Krishna Chaitanya Chundru wrote: > Please ignore this series it has wrong patches I will send new series to > fix this. You got feedback already. Best regards, Krzysztof
PCIe equalization presets are predefined settings used to optimize signal integrity by compensating for signal loss and distortion in high-speed data transmission. As per PCIe spec 6.0.1 revision section 8.3.3.3 & 4.2.4 for data rates of 8.0 GT/s, 16.0 GT/s, 32.0 GT/s, and 64.0 GT/s, there is a way to configure lane equalization presets for each lane to enhance the PCIe link reliability. Each preset value represents a different combination of pre-shoot and de-emphasis values. For each data rate, different registers are defined: for 8.0 GT/s, registers are defined in section 7.7.3.4; for 16.0 GT/s, in section 7.7.5.9, etc. The 8.0 GT/s rate has an extra receiver preset hint, requiring 16 bits per lane, while the remaining data rates use 8 bits per lane. Based on the number of lanes and the supported data rate, read the device tree property and stores in the presets structure. Based upon the lane width and supported data rate update lane equalization registers. This patch depends on the this dt binding pull request: https://github.com/devicetree-org/dt-schema/pull/146 Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> --- Changes in v2: - Fix the kernel test robot error - As suggested by konrad use for loop and read "eq-presets-%ugts", (8 << i) - Link to v1: https://lore.kernel.org/r/20241116-presets-v1-0-878a837a4fee@quicinc.com --- Krishna chaitanya chundru (4): arm64: dts: qcom: x1e80100: Add PCIe lane equalization preset properties PCI: of: Add API to retrieve equalization presets from device tree PCI: dwc: Improve handling of PCIe lane configuration PCI: dwc: Add support for new pci function op arch/arm64/boot/dts/qcom/x1e80100.dtsi | 8 ++++ drivers/pci/controller/dwc/pcie-designware-host.c | 21 +++++++++++ drivers/pci/controller/dwc/pcie-designware.c | 14 ++++++- drivers/pci/controller/dwc/pcie-designware.h | 1 + drivers/pci/of.c | 45 +++++++++++++++++++++++ drivers/pci/pci.h | 17 ++++++++- 6 files changed, 103 insertions(+), 3 deletions(-) --- base-commit: 87d6aab2389e5ce0197d8257d5f8ee965a67c4cd change-id: 20241212-preset_v2-549b7acda9b7 Best regards,