| Message ID | 20241216124507.2695739-1-ravi.kumar.vodapalli@intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | drm/i915/display: program DBUF_CTL tracker state service to 0x8 | expand |
On Mon, 16 Dec 2024, Ravi Kumar Vodapalli <ravi.kumar.vodapalli@intel.com> wrote: > Program Tracker state service(DBUF_CTL Register) for TGLLP, SVL, > RYF, DG1, ACM, ACMPLUS, RKLC, RKLGM, ADLS platforms to 0x8 which > is not the default value. Why? Every single commit message *must* state why the change is being made. What's the impact? The commit message is not supposed be just the patch translated to English. Please imagine having to write a high level pull request changelog similar to [1] based on commit messages alone. I have no idea what I would write about this change. BR, Jani. [1] https://lore.kernel.org/all/87h68ni0wd.fsf@intel.com/ > Bspec: 49213 > Signed-off-by: Ravi Kumar Vodapalli <ravi.kumar.vodapalli@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display_power.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c > index 34465d56def0..d9ba48b68979 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_power.c > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c > @@ -1126,7 +1126,9 @@ static void gen12_dbuf_slices_config(struct intel_display *display) > { > enum dbuf_slice slice; > > - if (display->platform.alderlake_p) > + if (display->platform.alderlake_p || display->platform.dg2 || > + display->platform.alderlake_p_raptorlake_p || > + DISPLAY_VER(display) >= 14) > return; > > for_each_dbuf_slice(display, slice)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c index 34465d56def0..d9ba48b68979 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.c +++ b/drivers/gpu/drm/i915/display/intel_display_power.c @@ -1126,7 +1126,9 @@ static void gen12_dbuf_slices_config(struct intel_display *display) { enum dbuf_slice slice; - if (display->platform.alderlake_p) + if (display->platform.alderlake_p || display->platform.dg2 || + display->platform.alderlake_p_raptorlake_p || + DISPLAY_VER(display) >= 14) return; for_each_dbuf_slice(display, slice)
Program Tracker state service(DBUF_CTL Register) for TGLLP, SVL, RYF, DG1, ACM, ACMPLUS, RKLC, RKLGM, ADLS platforms to 0x8 which is not the default value. Bspec: 49213 Signed-off-by: Ravi Kumar Vodapalli <ravi.kumar.vodapalli@intel.com> --- drivers/gpu/drm/i915/display/intel_display_power.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)