| Message ID | 20241219061340.1633173-3-wei.fang@nxp.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add NETC support for i.MX95 | expand |
On Thu, Dec 19, 2024 at 02:13:40PM +0800, Wei Fang wrote: > Add ENETC 0 (1G ethernet port) support for i.MX95-19x19-EVK board. In > addition, because all ENETC instances share MDIO bus, so enable EMDIO > at the same time. > > Signed-off-by: Wei Fang <wei.fang@nxp.com> > --- Reviewed-by: Frank Li <Frank.Li@nxp.com> > .../boot/dts/freescale/imx95-19x19-evk.dts | 52 +++++++++++++++++++ > 1 file changed, 52 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts > index 6086cb7fa5a0..8bc066c3760c 100644 > --- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts > +++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts > @@ -22,6 +22,7 @@ / { > compatible = "fsl,imx95-19x19-evk", "fsl,imx95"; > > aliases { > + ethernet0 = &enetc_port0; > gpio0 = &gpio1; > gpio1 = &gpio2; > gpio2 = &gpio3; > @@ -193,6 +194,14 @@ sound-wm8962 { > }; > }; > > +&enetc_port0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_enetc0>; > + phy-handle = <ðphy0>; > + phy-mode = "rgmii-id"; > + status = "okay"; > +}; > + > &flexspi1 { > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_flexspi1>; > @@ -338,6 +347,25 @@ &mu7 { > status = "okay"; > }; > > +&netcmix_blk_ctrl { > + status = "okay"; > +}; > + > +&netc_blk_ctrl { > + status = "okay"; > +}; > + > +&netc_emdio { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_emdio>; > + status = "okay"; > + > + ethphy0: ethernet-phy@1 { > + reg = <1>; > + realtek,clkout-disable; > + }; > +}; > + > &pcie0 { > pinctrl-0 = <&pinctrl_pcie0>; > pinctrl-names = "default"; > @@ -429,6 +457,30 @@ &wdog3 { > }; > > &scmi_iomuxc { > + pinctrl_emdio: emdiogrp{ > + fsl,pins = < > + IMX95_PAD_ENET1_MDC__NETCMIX_TOP_NETC_MDC 0x57e > + IMX95_PAD_ENET1_MDIO__NETCMIX_TOP_NETC_MDIO 0x97e > + >; > + }; > + > + pinctrl_enetc0: enetc0grp { > + fsl,pins = < > + IMX95_PAD_ENET1_TD3__NETCMIX_TOP_ETH0_RGMII_TD3 0x57e > + IMX95_PAD_ENET1_TD2__NETCMIX_TOP_ETH0_RGMII_TD2 0x57e > + IMX95_PAD_ENET1_TD1__NETCMIX_TOP_ETH0_RGMII_TD1 0x57e > + IMX95_PAD_ENET1_TD0__NETCMIX_TOP_ETH0_RGMII_TD0 0x57e > + IMX95_PAD_ENET1_TX_CTL__NETCMIX_TOP_ETH0_RGMII_TX_CTL 0x57e > + IMX95_PAD_ENET1_TXC__NETCMIX_TOP_ETH0_RGMII_TX_CLK 0x58e > + IMX95_PAD_ENET1_RX_CTL__NETCMIX_TOP_ETH0_RGMII_RX_CTL 0x57e > + IMX95_PAD_ENET1_RXC__NETCMIX_TOP_ETH0_RGMII_RX_CLK 0x58e > + IMX95_PAD_ENET1_RD0__NETCMIX_TOP_ETH0_RGMII_RD0 0x57e > + IMX95_PAD_ENET1_RD1__NETCMIX_TOP_ETH0_RGMII_RD1 0x57e > + IMX95_PAD_ENET1_RD2__NETCMIX_TOP_ETH0_RGMII_RD2 0x57e > + IMX95_PAD_ENET1_RD3__NETCMIX_TOP_ETH0_RGMII_RD3 0x57e > + >; > + }; > + > pinctrl_flexspi1: flexspi1grp { > fsl,pins = < > IMX95_PAD_XSPI1_SS0_B__FLEXSPI1_A_SS0_B 0x3fe > -- > 2.34.1 >
diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts index 6086cb7fa5a0..8bc066c3760c 100644 --- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts @@ -22,6 +22,7 @@ / { compatible = "fsl,imx95-19x19-evk", "fsl,imx95"; aliases { + ethernet0 = &enetc_port0; gpio0 = &gpio1; gpio1 = &gpio2; gpio2 = &gpio3; @@ -193,6 +194,14 @@ sound-wm8962 { }; }; +&enetc_port0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enetc0>; + phy-handle = <ðphy0>; + phy-mode = "rgmii-id"; + status = "okay"; +}; + &flexspi1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flexspi1>; @@ -338,6 +347,25 @@ &mu7 { status = "okay"; }; +&netcmix_blk_ctrl { + status = "okay"; +}; + +&netc_blk_ctrl { + status = "okay"; +}; + +&netc_emdio { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_emdio>; + status = "okay"; + + ethphy0: ethernet-phy@1 { + reg = <1>; + realtek,clkout-disable; + }; +}; + &pcie0 { pinctrl-0 = <&pinctrl_pcie0>; pinctrl-names = "default"; @@ -429,6 +457,30 @@ &wdog3 { }; &scmi_iomuxc { + pinctrl_emdio: emdiogrp{ + fsl,pins = < + IMX95_PAD_ENET1_MDC__NETCMIX_TOP_NETC_MDC 0x57e + IMX95_PAD_ENET1_MDIO__NETCMIX_TOP_NETC_MDIO 0x97e + >; + }; + + pinctrl_enetc0: enetc0grp { + fsl,pins = < + IMX95_PAD_ENET1_TD3__NETCMIX_TOP_ETH0_RGMII_TD3 0x57e + IMX95_PAD_ENET1_TD2__NETCMIX_TOP_ETH0_RGMII_TD2 0x57e + IMX95_PAD_ENET1_TD1__NETCMIX_TOP_ETH0_RGMII_TD1 0x57e + IMX95_PAD_ENET1_TD0__NETCMIX_TOP_ETH0_RGMII_TD0 0x57e + IMX95_PAD_ENET1_TX_CTL__NETCMIX_TOP_ETH0_RGMII_TX_CTL 0x57e + IMX95_PAD_ENET1_TXC__NETCMIX_TOP_ETH0_RGMII_TX_CLK 0x58e + IMX95_PAD_ENET1_RX_CTL__NETCMIX_TOP_ETH0_RGMII_RX_CTL 0x57e + IMX95_PAD_ENET1_RXC__NETCMIX_TOP_ETH0_RGMII_RX_CLK 0x58e + IMX95_PAD_ENET1_RD0__NETCMIX_TOP_ETH0_RGMII_RD0 0x57e + IMX95_PAD_ENET1_RD1__NETCMIX_TOP_ETH0_RGMII_RD1 0x57e + IMX95_PAD_ENET1_RD2__NETCMIX_TOP_ETH0_RGMII_RD2 0x57e + IMX95_PAD_ENET1_RD3__NETCMIX_TOP_ETH0_RGMII_RD3 0x57e + >; + }; + pinctrl_flexspi1: flexspi1grp { fsl,pins = < IMX95_PAD_XSPI1_SS0_B__FLEXSPI1_A_SS0_B 0x3fe
Add ENETC 0 (1G ethernet port) support for i.MX95-19x19-EVK board. In addition, because all ENETC instances share MDIO bus, so enable EMDIO at the same time. Signed-off-by: Wei Fang <wei.fang@nxp.com> --- .../boot/dts/freescale/imx95-19x19-evk.dts | 52 +++++++++++++++++++ 1 file changed, 52 insertions(+)