Message ID | 20241217170637.233097-1-carlo.nonato@minervasys.tech (mailing list archive) |
---|---|
Headers | show |
Series | Arm cache coloring | expand |
On 17/12/2024 18:06, Carlo Nonato wrote: > > > Shared caches in multi-core CPU architectures represent a problem for > predictability of memory access latency. This jeopardizes applicability > of many Arm platform in real-time critical and mixed-criticality > scenarios. We introduce support for cache partitioning with page > coloring, a transparent software technique that enables isolation > between domains and Xen, and thus avoids cache interference. > > When creating a domain, a simple syntax (e.g. `0-3` or `4-11`) allows > the user to define assignments of cache partitions ids, called colors, > where assigning different colors guarantees no mutual eviction on cache > will ever happen. This instructs the Xen memory allocator to provide > the i-th color assignee only with pages that maps to color i, i.e. that > are indexed in the i-th cache partition. > > The proposed implementation supports the dom0less feature. > The proposed implementation doesn't support the static-mem feature. > The solution has been tested in several scenarios, including Xilinx Zynq > MPSoCs. > > Carlo Nonato (11): > xen/common: add cache coloring common code > xen/arm: add initial support for LLC coloring on arm64 > xen/arm: permit non direct-mapped Dom0 construction > xen/arm: add Dom0 cache coloring support > xen: extend domctl interface for cache coloring > tools: add support for cache coloring configuration > xen/arm: add support for cache coloring configuration via device-tree > xen/page_alloc: introduce preserved page flags macro > xen: add cache coloring allocator for domains > xen/arm: make consider_modules() available for xen relocation > xen/arm: add cache coloring support for Xen image > > Luca Miccio (1): > xen/arm: add Xen cache colors command line parameter The series is now committed. Thanks. It's definitely a change that wants mentioning in CHANGELOG. I'll send a patch to add a note shortly. ~Michal
On Fri, Dec 20, 2024 at 8:34 AM Michal Orzel <michal.orzel@amd.com> wrote: > > On 17/12/2024 18:06, Carlo Nonato wrote: > > > > Shared caches in multi-core CPU architectures represent a problem for > > predictability of memory access latency. This jeopardizes applicability > > of many Arm platform in real-time critical and mixed-criticality > > scenarios. We introduce support for cache partitioning with page > > coloring, a transparent software technique that enables isolation > > between domains and Xen, and thus avoids cache interference. > > > > When creating a domain, a simple syntax (e.g. `0-3` or `4-11`) allows > > the user to define assignments of cache partitions ids, called colors, > > where assigning different colors guarantees no mutual eviction on cache > > will ever happen. This instructs the Xen memory allocator to provide > > the i-th color assignee only with pages that maps to color i, i.e. that > > are indexed in the i-th cache partition. > > > > The proposed implementation supports the dom0less feature. > > The proposed implementation doesn't support the static-mem feature. > > The solution has been tested in several scenarios, including Xilinx Zynq > > MPSoCs. > > > > Carlo Nonato (11): > > xen/common: add cache coloring common code > > xen/arm: add initial support for LLC coloring on arm64 > > xen/arm: permit non direct-mapped Dom0 construction > > xen/arm: add Dom0 cache coloring support > > xen: extend domctl interface for cache coloring > > tools: add support for cache coloring configuration > > xen/arm: add support for cache coloring configuration via device-tree > > xen/page_alloc: introduce preserved page flags macro > > xen: add cache coloring allocator for domains > > xen/arm: make consider_modules() available for xen relocation > > xen/arm: add cache coloring support for Xen image > > > > Luca Miccio (1): > > xen/arm: add Xen cache colors command line parameter > The series is now committed. Thanks. > > It's definitely a change that wants mentioning in CHANGELOG. I'll send a patch > to add a note shortly. Grazie (thanks in italian), to you and the other maintainers that helped. - Carlo