diff mbox series

[v4,6/7] tests/qtest/bios-table-test: testing new ARM ACPI PPTT topology

Message ID 20241216175414.1953-7-alireza.sanaee@huawei.com (mailing list archive)
State New
Headers show
Series Specifying cache topology on ARM | expand

Commit Message

Alireza Sanaee Dec. 16, 2024, 5:54 p.m. UTC
Test new PPTT topolopy with cache representation.

Signed-off-by: Alireza Sanaee <alireza.sanaee@huawei.com>
---
 tests/qtest/bios-tables-test.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

Comments

Jonathan Cameron Dec. 23, 2024, 6:11 p.m. UTC | #1
On Mon, 16 Dec 2024 17:54:13 +0000
Alireza Sanaee <alireza.sanaee@huawei.com> wrote:

> Test new PPTT topolopy with cache representation.
> 
> Signed-off-by: Alireza Sanaee <alireza.sanaee@huawei.com>
> ---
>  tests/qtest/bios-tables-test.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
> index 36e5c0adde..0f72520664 100644
> --- a/tests/qtest/bios-tables-test.c
> +++ b/tests/qtest/bios-tables-test.c
> @@ -2019,7 +2019,11 @@ static void test_acpi_aarch64_virt_tcg_topology(void)
>          .scan_len = 128ULL * 1024 * 1024,
>      };
>  
> -    test_acpi_one("-cpu cortex-a57 "
> +    test_acpi_one("-M virt,smp-cache.0.cache=l1i,smp-cache.0.topology=cluster,"
> +                  "smp-cache.1.cache=l1d,smp-cache.1.topology=cluster,"
> +                  "smp-cache.2.cache=l2,smp-cache.2.topology=cluster,"
> +                  "smp-cache.3.cache=l3,smp-cache.3.topology=cluster "
> +                  "-cpu cortex-a57 "
Trivial but is there a reason the cpu must come after machine / -M bits?
If not I'd leave it on first line to reduce the churn in this patch a little.

Either way,

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>


>                    "-smp sockets=1,clusters=2,cores=2,threads=2", &data);
>      free_test_data(&data);
>  }
Alireza Sanaee Dec. 24, 2024, 8:44 a.m. UTC | #2
On Mon, 23 Dec 2024 18:11:45 +0000
Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:

> On Mon, 16 Dec 2024 17:54:13 +0000
> Alireza Sanaee <alireza.sanaee@huawei.com> wrote:
> 
> > Test new PPTT topolopy with cache representation.
> > 
> > Signed-off-by: Alireza Sanaee <alireza.sanaee@huawei.com>
> > ---
> >  tests/qtest/bios-tables-test.c | 6 +++++-
> >  1 file changed, 5 insertions(+), 1 deletion(-)
> > 
> > diff --git a/tests/qtest/bios-tables-test.c
> > b/tests/qtest/bios-tables-test.c index 36e5c0adde..0f72520664 100644
> > --- a/tests/qtest/bios-tables-test.c
> > +++ b/tests/qtest/bios-tables-test.c
> > @@ -2019,7 +2019,11 @@ static void
> > test_acpi_aarch64_virt_tcg_topology(void) .scan_len = 128ULL * 1024
> > * 1024, };
> >  
> > -    test_acpi_one("-cpu cortex-a57 "
> > +    test_acpi_one("-M
> > virt,smp-cache.0.cache=l1i,smp-cache.0.topology=cluster,"
> > +
> > "smp-cache.1.cache=l1d,smp-cache.1.topology=cluster,"
> > +
> > "smp-cache.2.cache=l2,smp-cache.2.topology=cluster,"
> > +
> > "smp-cache.3.cache=l3,smp-cache.3.topology=cluster "
> > +                  "-cpu cortex-a57 "  
> Trivial but is there a reason the cpu must come after machine / -M
> bits? If not I'd leave it on first line to reduce the churn in this
> patch a little.
Noted. Less churn.
> 
> Either way,
> 
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> 
> 
> >                    "-smp sockets=1,clusters=2,cores=2,threads=2",
> > &data); free_test_data(&data);
> >  }  
>
diff mbox series

Patch

diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index 36e5c0adde..0f72520664 100644
--- a/tests/qtest/bios-tables-test.c
+++ b/tests/qtest/bios-tables-test.c
@@ -2019,7 +2019,11 @@  static void test_acpi_aarch64_virt_tcg_topology(void)
         .scan_len = 128ULL * 1024 * 1024,
     };
 
-    test_acpi_one("-cpu cortex-a57 "
+    test_acpi_one("-M virt,smp-cache.0.cache=l1i,smp-cache.0.topology=cluster,"
+                  "smp-cache.1.cache=l1d,smp-cache.1.topology=cluster,"
+                  "smp-cache.2.cache=l2,smp-cache.2.topology=cluster,"
+                  "smp-cache.3.cache=l3,smp-cache.3.topology=cluster "
+                  "-cpu cortex-a57 "
                   "-smp sockets=1,clusters=2,cores=2,threads=2", &data);
     free_test_data(&data);
 }