diff mbox series

[2/3] clk: xilinx: vcu: don't set pll_ref as parent of VCU(enc/dec) clocks

Message ID 20241226122023.3439559-3-rohit.visavalia@amd.com (mailing list archive)
State Changes Requested, archived
Headers show
Series clk: xilinx: vcu: Sequence update and couple of fixes | expand

Commit Message

Rohit Visavalia Dec. 26, 2024, 12:20 p.m. UTC
CCF will try to adjust parent clock to set desire clock frequency of
child clock. So if pll_ref is not a fixed-clock then while setting rate
of enc/dec clocks pll_ref may get change, which may make VCU malfunction.

Signed-off-by: Rohit Visavalia <rohit.visavalia@amd.com>
---
 drivers/clk/xilinx/xlnx_vcu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Stephen Boyd Dec. 31, 2024, 12:35 a.m. UTC | #1
Quoting Rohit Visavalia (2024-12-26 04:20:22)
> CCF will try to adjust parent clock to set desire clock frequency of
> child clock. So if pll_ref is not a fixed-clock then while setting rate
> of enc/dec clocks pll_ref may get change, which may make VCU malfunction.
> 
> Signed-off-by: Rohit Visavalia <rohit.visavalia@amd.com>
> ---
>  drivers/clk/xilinx/xlnx_vcu.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/xilinx/xlnx_vcu.c b/drivers/clk/xilinx/xlnx_vcu.c
> index f294a2398cb4..c3a4df7e325a 100644
> --- a/drivers/clk/xilinx/xlnx_vcu.c
> +++ b/drivers/clk/xilinx/xlnx_vcu.c
> @@ -550,7 +550,7 @@ static int xvcu_register_clock_provider(struct xvcu_device *xvcu)
>                 return PTR_ERR(hw);
>         xvcu->pll_post = hw;
>  
> -       parent_data[0].fw_name = "pll_ref";
> +       parent_data[0].fw_name = "dummy_name";

"dummy_name" isn't part of the binding. It sounds like you want to not
set CLK_SET_RATE_PARENT flag sometimes?

>         parent_data[1].hw = xvcu->pll_post;
>  
>         hws[CLK_XVCU_ENC_CORE] =
Rohit Visavalia Dec. 31, 2024, 2:16 p.m. UTC | #2
Hi Stephen,

Thanks for the review.

>-----Original Message-----
>From: Stephen Boyd <sboyd@kernel.org>
>Sent: Tuesday, December 31, 2024 6:06 AM
>To: Visavalia, Rohit <rohit.visavalia@amd.com>; Simek, Michal
><michal.simek@amd.com>; mturquette@baylibre.com; Sagar, Vishal
><vishal.sagar@amd.com>
>Cc: javier.carrasco.cruz@gmail.com; geert+renesas@glider.be; u.kleine-
>koenig@baylibre.com; linux-clk@vger.kernel.org; linux-arm-
>kernel@lists.infradead.org; linux-kernel@vger.kernel.org; Visavalia, Rohit
><rohit.visavalia@amd.com>
>Subject: Re: [PATCH 2/3] clk: xilinx: vcu: don't set pll_ref as parent of
>VCU(enc/dec) clocks
>
>Quoting Rohit Visavalia (2024-12-26 04:20:22)
>> CCF will try to adjust parent clock to set desire clock frequency of
>> child clock. So if pll_ref is not a fixed-clock then while setting
>> rate of enc/dec clocks pll_ref may get change, which may make VCU
>malfunction.
>>
>> Signed-off-by: Rohit Visavalia <rohit.visavalia@amd.com>
>> ---
>>  drivers/clk/xilinx/xlnx_vcu.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/clk/xilinx/xlnx_vcu.c
>> b/drivers/clk/xilinx/xlnx_vcu.c index f294a2398cb4..c3a4df7e325a
>> 100644
>> --- a/drivers/clk/xilinx/xlnx_vcu.c
>> +++ b/drivers/clk/xilinx/xlnx_vcu.c
>> @@ -550,7 +550,7 @@ static int xvcu_register_clock_provider(struct
>xvcu_device *xvcu)
>>                 return PTR_ERR(hw);
>>         xvcu->pll_post = hw;
>>
>> -       parent_data[0].fw_name = "pll_ref";
>> +       parent_data[0].fw_name = "dummy_name";
>
>"dummy_name" isn't part of the binding. It sounds like you want to not set
>CLK_SET_RATE_PARENT flag sometimes?
Yes, if parent rate(pll_ref) has been changed then VCU is not working correctly. So, making name as dummy.

>
>>         parent_data[1].hw = xvcu->pll_post;
>>
>>         hws[CLK_XVCU_ENC_CORE] =

Thanks
Rohit
diff mbox series

Patch

diff --git a/drivers/clk/xilinx/xlnx_vcu.c b/drivers/clk/xilinx/xlnx_vcu.c
index f294a2398cb4..c3a4df7e325a 100644
--- a/drivers/clk/xilinx/xlnx_vcu.c
+++ b/drivers/clk/xilinx/xlnx_vcu.c
@@ -550,7 +550,7 @@  static int xvcu_register_clock_provider(struct xvcu_device *xvcu)
 		return PTR_ERR(hw);
 	xvcu->pll_post = hw;
 
-	parent_data[0].fw_name = "pll_ref";
+	parent_data[0].fw_name = "dummy_name";
 	parent_data[1].hw = xvcu->pll_post;
 
 	hws[CLK_XVCU_ENC_CORE] =