| Message ID | 20250103090731.1355-3-divya.koppera@microchip.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | Add PEROUT library for RDS PTP supported phys | expand |
On Fri, Jan 03, 2025 at 02:37:30PM +0530, Divya Koppera wrote: > Adds support for enabling GPIO pins that are required > to generate periodic output signals on lan887x phy. Do the GPIO have other functions? Can they be used as additional LEDs? I'm just thinking about resource allocation... Andrew
Hi Andrew, Thanks for the review. > -----Original Message----- > From: Andrew Lunn <andrew@lunn.ch> > Sent: Friday, January 3, 2025 7:36 PM > To: Divya Koppera - I30481 <Divya.Koppera@microchip.com> > Cc: Arun Ramadoss - I17769 <Arun.Ramadoss@microchip.com>; > UNGLinuxDriver <UNGLinuxDriver@microchip.com>; hkallweit1@gmail.com; > linux@armlinux.org.uk; davem@davemloft.net; edumazet@google.com; > kuba@kernel.org; pabeni@redhat.com; netdev@vger.kernel.org; linux- > kernel@vger.kernel.org; richardcochran@gmail.com; > vadim.fedorenko@linux.dev > Subject: Re: [PATCH net-next 2/3] net: phy: microchip_t1: Enable GPIO pins > specific to lan887x phy for PEROUT signals > > EXTERNAL EMAIL: Do not click links or open attachments unless you know the > content is safe > > On Fri, Jan 03, 2025 at 02:37:30PM +0530, Divya Koppera wrote: > > Adds support for enabling GPIO pins that are required to generate > > periodic output signals on lan887x phy. > > Do the GPIO have other functions? Can they be used as additional LEDs? > > I'm just thinking about resource allocation... > We are supporting 2 events(PPS, REF_CLK) out of it PPS is default. REF_CLK is a GPIO pin which has led2 as alternate function. But lan887x uses led3 as default led. Yes, we need to have check if the gpio been already used as led for event 2. We will take care in next revision. > Andrew Thanks, Divya
diff --git a/drivers/net/phy/microchip_t1.c b/drivers/net/phy/microchip_t1.c index 73f28463bc35..b0a34f794f4c 100644 --- a/drivers/net/phy/microchip_t1.c +++ b/drivers/net/phy/microchip_t1.c @@ -273,6 +273,11 @@ /* End offset of samples */ #define SQI_INLIERS_END (SQI_INLIERS_START + SQI_INLIERS_NUM) +#define LAN887X_MX_CHIP_TOP_REG_CONTROL1 (0xF002) +#define LAN887X_MX_CHIP_TOP_REG_CONTROL1_EVT_EN BIT(8) +#define LAN887X_MX_CHIP_TOP_REG_CONTROL1_REF_CLK BIT(9) +#define LAN887X_MX_CHIP_TOP_REG_CONTROL1_GPIO2_EN BIT(5) + #define DRIVER_AUTHOR "Nisar Sayed <nisar.sayed@microchip.com>" #define DRIVER_DESC "Microchip LAN87XX/LAN937x/LAN887x T1 PHY driver" @@ -1286,6 +1291,19 @@ static int lan887x_phy_init(struct phy_device *phydev) if (IS_ERR(priv->clock)) return PTR_ERR(priv->clock); + /* Enable pin mux for GPIO 2(EVT B) as ref clk */ + /* Enable pin mux for EVT A */ + phy_modify_mmd(phydev, MDIO_MMD_VEND1, + LAN887X_MX_CHIP_TOP_REG_CONTROL1, + LAN887X_MX_CHIP_TOP_REG_CONTROL1_REF_CLK | + LAN887X_MX_CHIP_TOP_REG_CONTROL1_EVT_EN, + LAN887X_MX_CHIP_TOP_REG_CONTROL1_REF_CLK | + LAN887X_MX_CHIP_TOP_REG_CONTROL1_EVT_EN); + + /* Initialize pin numbers specific to PEROUT */ + priv->clock->gpio_event_a = 3; + priv->clock->gpio_event_b = 1; + priv->init_done = true; }
Adds support for enabling GPIO pins that are required to generate periodic output signals on lan887x phy. Signed-off-by: Divya Koppera <divya.koppera@microchip.com> --- drivers/net/phy/microchip_t1.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)