| Message ID | 20250107044038.100945-3-rohit.visavalia@amd.com (mailing list archive) |
|---|---|
| State | Accepted, archived |
| Headers | show |
| Series | dt-bindings: clock: xilinx: Update VCU bindings | expand |
On Mon, Jan 06, 2025 at 08:40:38PM -0800, Rohit Visavalia wrote: > It is marked as optional as some of the ZynqMP designs are having vcu_reset > (reset pin of VCU IP) driven by proc_sys_reset, proc_sys_reset is another > PL IP driven by the PS pl_reset. So, here the VCU reset is not driven by > axi_gpio or PS GPIO so there will be no GPIO entry. > > Signed-off-by: Rohit Visavalia <rohit.visavalia@amd.com> > --- > Changes in v2: > - dropped description GPIO property > - used decimal number for GPIO > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
Quoting Rohit Visavalia (2025-01-06 20:40:38) > It is marked as optional as some of the ZynqMP designs are having vcu_reset > (reset pin of VCU IP) driven by proc_sys_reset, proc_sys_reset is another > PL IP driven by the PS pl_reset. So, here the VCU reset is not driven by > axi_gpio or PS GPIO so there will be no GPIO entry. > > Signed-off-by: Rohit Visavalia <rohit.visavalia@amd.com> > --- Applied to clk-next
diff --git a/Documentation/devicetree/bindings/clock/xlnx,vcu.yaml b/Documentation/devicetree/bindings/clock/xlnx,vcu.yaml index 02d27d11a452..19dc923e2ee9 100644 --- a/Documentation/devicetree/bindings/clock/xlnx,vcu.yaml +++ b/Documentation/devicetree/bindings/clock/xlnx,vcu.yaml @@ -33,6 +33,9 @@ properties: - const: pll_ref - const: aclk + reset-gpios: + maxItems: 1 + required: - reg - clocks @@ -49,6 +52,7 @@ examples: xlnx_vcu: vcu@a0040000 { compatible = "xlnx,vcu-logicoreip-1.0"; reg = <0x0 0xa0040000 0x0 0x1000>; + reset-gpios = <&gpio 78 GPIO_ACTIVE_HIGH>; clocks = <&si570_1>, <&clkc 71>; clock-names = "pll_ref", "aclk"; };
It is marked as optional as some of the ZynqMP designs are having vcu_reset (reset pin of VCU IP) driven by proc_sys_reset, proc_sys_reset is another PL IP driven by the PS pl_reset. So, here the VCU reset is not driven by axi_gpio or PS GPIO so there will be no GPIO entry. Signed-off-by: Rohit Visavalia <rohit.visavalia@amd.com> --- Changes in v2: - dropped description GPIO property - used decimal number for GPIO --- Documentation/devicetree/bindings/clock/xlnx,vcu.yaml | 4 ++++ 1 file changed, 4 insertions(+)