| Message ID | 20250103060407.1064107-2-va@nvidia.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Configure Clocks, Add Native Dma support. | expand |
On Fri, Jan 03, 2025 at 06:04:02AM +0000, Vishwaroop A wrote: > Set QSPI0_2X_PM to 199.99 MHz and QSPI0_PM to 99.99 MHz using > PLLC as the parent clock. These frequencies allow Quad IO DT > reads up to 99.99 MHz, which is the fastest that can be > achieved considering various PLL and clock divider constraints. > > Populate the DMA and IOMMU properties for the Tegra234 QSPI devices to > enable DMA support. > > Change-Id: I1dded904aa8e0f278c89998481e829f1ce474e8c > Signed-off-by: Vishwaroop A <va@nvidia.com> > --- > arch/arm64/boot/dts/nvidia/tegra234.dtsi | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi > index 984c85eab41a..96d0f13390ae 100644 > --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi > +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi > @@ -2948,6 +2948,13 @@ > <&bpmp TEGRA234_CLK_QSPI0_PM>; > clock-names = "qspi", "qspi_out"; > resets = <&bpmp TEGRA234_RESET_QSPI0>; > + assigned-clocks = <&bpmp TEGRA234_CLK_QSPI0_2X_PM>, > + <&bpmp TEGRA234_CLK_QSPI0_PM>; > + assigned-clock-rates = <199999999 99999999>; > + assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLC>; > + dma-names = "rx", "tx"; > + dma-coherent; > + iommus = <&smmu_niso1 TEGRA234_SID_QSPI0>; > status = "disabled"; > }; > > @@ -3031,6 +3038,13 @@ > <&bpmp TEGRA234_CLK_QSPI1_PM>; > clock-names = "qspi", "qspi_out"; > resets = <&bpmp TEGRA234_RESET_QSPI1>; > + assigned-clocks = <&bpmp TEGRA234_CLK_QSPI1_2X_PM>, > + <&bpmp TEGRA234_CLK_QSPI1_PM>; > + assigned-clock-rates = <199999999 99999999>; > + assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLC>; > + dma-names = "rx", "tx"; > + dma-coherent; > + iommus = <&smmu_niso1 TEGRA234_SID_QSPI1>; > status = "disabled"; > }; > It looks like these are missing the "dmas" properties that go along with "dma-names". Thierry
On 12/02/2025 14:39, Vishwaroop A wrote: > > > ________________________________________ > From: Thierry Reding > Sent: Thursday, January 09, 2025 16:10 > To: Vishwaroop A > Cc: Jon Hunter; Sowjanya Komatineni; Laxman Dewangan; broonie@kernel.org; linux-spi@vger.kernel.org; linux-tegra@vger.kernel.org; linux-kernel@vger.kernel.org; Krishna Yarlagadda; Suresh Mangipudi > Subject: Re: [PATCH V1 1/6] arm64: tegra: Configure QSPI clocks and add DMA > > On Fri, Jan 03, 2025 at 06:04:02AM +0000, Vishwaroop A wrote: >> Set QSPI0_2X_PM to 199.99 MHz and QSPI0_PM to 99.99 MHz using >> PLLC as the parent clock. These frequencies allow Quad IO DT >> reads up to 99.99 MHz, which is the fastest that can be >> achieved considering various PLL and clock divider constraints. >> >> Populate the DMA and IOMMU properties for the Tegra234 QSPI devices to >> enable DMA support. >> >> Change-Id: I1dded904aa8e0f278c89998481e829f1ce474e8c >> Signed-off-by: Vishwaroop A <va@nvidia.com> >> --- >> arch/arm64/boot/dts/nvidia/tegra234.dtsi | 14 ++++++++++++++ >> 1 file changed, 14 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi >> index 984c85eab41a..96d0f13390ae 100644 >> --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi >> +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi >> @@ -2948,6 +2948,13 @@ >> <&bpmp TEGRA234_CLK_QSPI0_PM>; >> clock-names = "qspi", "qspi_out"; >> resets = <&bpmp TEGRA234_RESET_QSPI0>; >> + assigned-clocks = <&bpmp TEGRA234_CLK_QSPI0_2X_PM>, >> + <&bpmp TEGRA234_CLK_QSPI0_PM>; >> + assigned-clock-rates = <199999999 99999999>; >> + assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLC>; >> + dma-names = "rx", "tx"; >> + dma-coherent; >> + iommus = <&smmu_niso1 TEGRA234_SID_QSPI0>; >> status = "disabled"; >> }; >> >> @@ -3031,6 +3038,13 @@ >> <&bpmp TEGRA234_CLK_QSPI1_PM>; >> clock-names = "qspi", "qspi_out"; >> resets = <&bpmp TEGRA234_RESET_QSPI1>; >> + assigned-clocks = <&bpmp TEGRA234_CLK_QSPI1_2X_PM>, >> + <&bpmp TEGRA234_CLK_QSPI1_PM>; >> + assigned-clock-rates = <199999999 99999999>; >> + assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLC>; >> + dma-names = "rx", "tx"; >> + dma-coherent; >> + iommus = <&smmu_niso1 TEGRA234_SID_QSPI1>; >> status = "disabled"; >> }; >> > >>> It looks like these are missing the "dmas" properties that go along with "dma-names". > [Vishwaroop A] dmas property is not required as QSPI uses native dma engine. dmas property is used for assigning the dma channels. In case of QSPI it has own native DMA engine. OK so that means we don't need the 'dma-names' here either. Please remove this. Jon
diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi index 984c85eab41a..96d0f13390ae 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi @@ -2948,6 +2948,13 @@ <&bpmp TEGRA234_CLK_QSPI0_PM>; clock-names = "qspi", "qspi_out"; resets = <&bpmp TEGRA234_RESET_QSPI0>; + assigned-clocks = <&bpmp TEGRA234_CLK_QSPI0_2X_PM>, + <&bpmp TEGRA234_CLK_QSPI0_PM>; + assigned-clock-rates = <199999999 99999999>; + assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLC>; + dma-names = "rx", "tx"; + dma-coherent; + iommus = <&smmu_niso1 TEGRA234_SID_QSPI0>; status = "disabled"; }; @@ -3031,6 +3038,13 @@ <&bpmp TEGRA234_CLK_QSPI1_PM>; clock-names = "qspi", "qspi_out"; resets = <&bpmp TEGRA234_RESET_QSPI1>; + assigned-clocks = <&bpmp TEGRA234_CLK_QSPI1_2X_PM>, + <&bpmp TEGRA234_CLK_QSPI1_PM>; + assigned-clock-rates = <199999999 99999999>; + assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLC>; + dma-names = "rx", "tx"; + dma-coherent; + iommus = <&smmu_niso1 TEGRA234_SID_QSPI1>; status = "disabled"; };
Set QSPI0_2X_PM to 199.99 MHz and QSPI0_PM to 99.99 MHz using PLLC as the parent clock. These frequencies allow Quad IO DT reads up to 99.99 MHz, which is the fastest that can be achieved considering various PLL and clock divider constraints. Populate the DMA and IOMMU properties for the Tegra234 QSPI devices to enable DMA support. Change-Id: I1dded904aa8e0f278c89998481e829f1ce474e8c Signed-off-by: Vishwaroop A <va@nvidia.com> --- arch/arm64/boot/dts/nvidia/tegra234.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+)