| Message ID | 20250109125204.3668961-3-cezary.rojewski@intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | ALSA: hda: Compilation and firmware-loading fixes | expand |
On Thu, 09 Jan 2025 13:52:03 +0100, Cezary Rojewski wrote: > > As per specification, SDxLVI shall be at least 1 i.e.: two chunks to > perform a valid transfer. This is true for the PCM transfer code but > not firmware-transfer one. > > Technical background: > - the LVI > 0 rule shall be obeyed in PCM transfer > - HW permits LVI == 0 when transfer is SW-controlled (SPIB) > - FW download is not a PCM transfer and is SW-controlled (SPIB) > > The above is the fundament which AudioDSP firmware loading functions > have been built upon and worked since 2016. The presented changes are to > align the loading flows and avoid rising more questions in the future. > > Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> > --- > sound/hda/hdac_stream.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/sound/hda/hdac_stream.c b/sound/hda/hdac_stream.c > index 2670792f43b4..18d74a28a246 100644 > --- a/sound/hda/hdac_stream.c > +++ b/sound/hda/hdac_stream.c > @@ -455,6 +455,7 @@ static int setup_bdle(struct hdac_bus *bus, > struct hdac_stream *azx_dev, __le32 **bdlp, > int ofs, int size, int with_ioc) > { > + u32 bdle_size = size / 2; > __le32 *bdl = *bdlp; > > while (size > 0) { > @@ -469,7 +470,7 @@ static int setup_bdle(struct hdac_bus *bus, > bdl[0] = cpu_to_le32((u32)addr); > bdl[1] = cpu_to_le32(upper_32_bits(addr)); > /* program the size field of the BDL entry */ > - chunk = snd_sgbuf_get_chunk_size(dmab, ofs, size); > + chunk = snd_sgbuf_get_chunk_size(dmab, ofs, bdle_size); > /* one BDLE cannot cross 4K boundary on CTHDA chips */ > if (bus->align_bdle_4k) { > u32 remain = 0x1000 - (ofs & 0xfff); Note that we set up BDLE also for the fragment for pos_adj correction at the beginning of the buffer. With your patch, this small BDLE would be split again. I don't think it's the desired outcome. The requirement is to have at least two BDL entries? thanks, Takashi
On 2025-01-09 3:29 PM, Takashi Iwai wrote: > On Thu, 09 Jan 2025 13:52:03 +0100, > Cezary Rojewski wrote: >> >> As per specification, SDxLVI shall be at least 1 i.e.: two chunks to >> perform a valid transfer. This is true for the PCM transfer code but >> not firmware-transfer one. >> >> Technical background: >> - the LVI > 0 rule shall be obeyed in PCM transfer >> - HW permits LVI == 0 when transfer is SW-controlled (SPIB) >> - FW download is not a PCM transfer and is SW-controlled (SPIB) >> >> The above is the fundament which AudioDSP firmware loading functions >> have been built upon and worked since 2016. The presented changes are to >> align the loading flows and avoid rising more questions in the future. >> >> Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> >> --- >> sound/hda/hdac_stream.c | 3 ++- >> 1 file changed, 2 insertions(+), 1 deletion(-) >> >> diff --git a/sound/hda/hdac_stream.c b/sound/hda/hdac_stream.c >> index 2670792f43b4..18d74a28a246 100644 >> --- a/sound/hda/hdac_stream.c >> +++ b/sound/hda/hdac_stream.c >> @@ -455,6 +455,7 @@ static int setup_bdle(struct hdac_bus *bus, >> struct hdac_stream *azx_dev, __le32 **bdlp, >> int ofs, int size, int with_ioc) >> { >> + u32 bdle_size = size / 2; >> __le32 *bdl = *bdlp; >> >> while (size > 0) { >> @@ -469,7 +470,7 @@ static int setup_bdle(struct hdac_bus *bus, >> bdl[0] = cpu_to_le32((u32)addr); >> bdl[1] = cpu_to_le32(upper_32_bits(addr)); >> /* program the size field of the BDL entry */ >> - chunk = snd_sgbuf_get_chunk_size(dmab, ofs, size); >> + chunk = snd_sgbuf_get_chunk_size(dmab, ofs, bdle_size); >> /* one BDLE cannot cross 4K boundary on CTHDA chips */ >> if (bus->align_bdle_4k) { >> u32 remain = 0x1000 - (ofs & 0xfff); > > Note that we set up BDLE also for the fragment for pos_adj correction > at the beginning of the buffer. With your patch, this small BDLE > would be split again. I don't think it's the desired outcome. > > The requirement is to have at least two BDL entries? Indeed, that's the requirement. SDxLVI of 0 translates to 1x BDL entry (BDLE), SDxLVI of 1 translates to 2x BDLEs. As the commit message explains, the existing code causes no known issues for the platforms available on the market but we want to be forward-compatible and avoid revisiting the subject in future. To address this, the hardware team recommends to update the firmware-loading code to follow similar rules the PCM-transfer does. In regard to pos_adj, the DSP-capable drivers e.g.: the avs-driver, do not utilize the bus->bdl_pos_adj field. To the best of my knowledge, it's always set to zero so all the conditional code that takes pos_adj into account is ignored. Kind regards, Czarek
diff --git a/sound/hda/hdac_stream.c b/sound/hda/hdac_stream.c index 2670792f43b4..18d74a28a246 100644 --- a/sound/hda/hdac_stream.c +++ b/sound/hda/hdac_stream.c @@ -455,6 +455,7 @@ static int setup_bdle(struct hdac_bus *bus, struct hdac_stream *azx_dev, __le32 **bdlp, int ofs, int size, int with_ioc) { + u32 bdle_size = size / 2; __le32 *bdl = *bdlp; while (size > 0) { @@ -469,7 +470,7 @@ static int setup_bdle(struct hdac_bus *bus, bdl[0] = cpu_to_le32((u32)addr); bdl[1] = cpu_to_le32(upper_32_bits(addr)); /* program the size field of the BDL entry */ - chunk = snd_sgbuf_get_chunk_size(dmab, ofs, size); + chunk = snd_sgbuf_get_chunk_size(dmab, ofs, bdle_size); /* one BDLE cannot cross 4K boundary on CTHDA chips */ if (bus->align_bdle_4k) { u32 remain = 0x1000 - (ofs & 0xfff);
As per specification, SDxLVI shall be at least 1 i.e.: two chunks to perform a valid transfer. This is true for the PCM transfer code but not firmware-transfer one. Technical background: - the LVI > 0 rule shall be obeyed in PCM transfer - HW permits LVI == 0 when transfer is SW-controlled (SPIB) - FW download is not a PCM transfer and is SW-controlled (SPIB) The above is the fundament which AudioDSP firmware loading functions have been built upon and worked since 2016. The presented changes are to align the loading flows and avoid rising more questions in the future. Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> --- sound/hda/hdac_stream.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)