| Message ID | 20250109133513.20151-6-kyrie.wu@mediatek.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Enable jpeg enc & dec multi-hardwares for MT8196 | expand |
Il 09/01/25 14:35, kyrie.wu ha scritto: > 1. different IC has different hw core; > 2. use a parameter to set jpeg hw count. In MT8195, each decoder core has its own devicetree node, so you can count how many cores are actually present and registered. Please do the same with MT8196, and replace MTK_JPEG{ENC,DEC}_HW_MAX with a variable that stores the number of cores, counted at probe time. Regards, Angelo > > Signed-off-by: kyrie.wu <kyrie.wu@mediatek.com> > --- > .../platform/mediatek/jpeg/mtk_jpeg_core.c | 28 +++++++++++++++---- > .../platform/mediatek/jpeg/mtk_jpeg_core.h | 2 ++ > 2 files changed, 25 insertions(+), 5 deletions(-) > > diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c > index 77b3bd6c4d3f..4dc6f82d74fa 100644 > --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c > +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c > @@ -1468,7 +1468,7 @@ static int mtk_jpegenc_get_hw(struct mtk_jpeg_ctx *ctx) > int i; > > spin_lock_irqsave(&jpeg->hw_lock, flags); > - for (i = 0; i < MTK_JPEGENC_HW_MAX; i++) { > + for (i = 0; i < jpeg->variant->max_hw_count; i++) { > comp_jpeg = jpeg->enc_hw_dev[i]; > if (comp_jpeg->hw_state == MTK_JPEG_HW_IDLE) { > hw_id = i; > @@ -1515,7 +1515,7 @@ static int mtk_jpegdec_get_hw(struct mtk_jpeg_ctx *ctx) > int i; > > spin_lock_irqsave(&jpeg->hw_lock, flags); > - for (i = 0; i < MTK_JPEGDEC_HW_MAX; i++) { > + for (i = 0; i < jpeg->variant->max_hw_count; i++) { > comp_jpeg = jpeg->dec_hw_dev[i]; > if (comp_jpeg->hw_state == MTK_JPEG_HW_IDLE) { > hw_id = i; > @@ -1598,7 +1598,7 @@ static void mtk_jpegenc_worker(struct work_struct *work) > jpeg_work); > struct mtk_jpeg_dev *jpeg = ctx->jpeg; > > - for (i = 0; i < MTK_JPEGENC_HW_MAX; i++) > + for (i = 0; i < jpeg->variant->max_hw_count; i++) > comp_jpeg[i] = jpeg->enc_hw_dev[i]; > i = 0; > > @@ -1696,7 +1696,7 @@ static void mtk_jpegdec_worker(struct work_struct *work) > struct mtk_jpeg_fb fb; > unsigned long flags; > > - for (i = 0; i < MTK_JPEGDEC_HW_MAX; i++) > + for (i = 0; i < jpeg->variant->max_hw_count; i++) > comp_jpeg[i] = jpeg->dec_hw_dev[i]; > i = 0; > > @@ -1925,6 +1925,7 @@ static struct mtk_jpeg_variant mtk8195_jpegenc_drvdata = { > .out_q_default_fourcc = V4L2_PIX_FMT_YUYV, > .cap_q_default_fourcc = V4L2_PIX_FMT_JPEG, > .multi_core = true, > + .max_hw_count = 2, > .jpeg_worker = mtk_jpegenc_worker, > }; > > @@ -1938,6 +1939,21 @@ static const struct mtk_jpeg_variant mtk8195_jpegdec_drvdata = { > .out_q_default_fourcc = V4L2_PIX_FMT_JPEG, > .cap_q_default_fourcc = V4L2_PIX_FMT_YUV420M, > .multi_core = true, > + .max_hw_count = 3, > + .jpeg_worker = mtk_jpegdec_worker, > +}; > + > +static const struct mtk_jpeg_variant mtk8196_jpegdec_drvdata = { > + .formats = mtk_jpeg_dec_formats, > + .num_formats = MTK_JPEG_DEC_NUM_FORMATS, > + .qops = &mtk_jpeg_dec_qops, > + .m2m_ops = &mtk_jpeg_multicore_dec_m2m_ops, > + .dev_name = "mtk-jpeg-dec", > + .ioctl_ops = &mtk_jpeg_dec_ioctl_ops, > + .out_q_default_fourcc = V4L2_PIX_FMT_JPEG, > + .cap_q_default_fourcc = V4L2_PIX_FMT_YUV420M, > + .multi_core = true, > + .max_hw_count = 2, > .jpeg_worker = mtk_jpegdec_worker, > }; > > @@ -1954,6 +1970,7 @@ static const struct mtk_jpeg_variant mtk8188_jpegenc_drvdata = { > .ioctl_ops = &mtk_jpeg_enc_ioctl_ops, > .out_q_default_fourcc = V4L2_PIX_FMT_YUYV, > .cap_q_default_fourcc = V4L2_PIX_FMT_JPEG, > + .max_hw_count = 1, > .support_34bit = true, > }; > > @@ -1970,6 +1987,7 @@ static const struct mtk_jpeg_variant mtk8188_jpegdec_drvdata = { > .ioctl_ops = &mtk_jpeg_dec_ioctl_ops, > .out_q_default_fourcc = V4L2_PIX_FMT_JPEG, > .cap_q_default_fourcc = V4L2_PIX_FMT_YUV420M, > + .max_hw_count = 1, > .support_34bit = true, > }; > > @@ -2008,7 +2026,7 @@ static const struct of_device_id mtk_jpeg_match[] = { > }, > { > .compatible = "mediatek,mt8196-jpgdec", > - .data = &mtk8195_jpegdec_drvdata, > + .data = &mtk8196_jpegdec_drvdata, > }, > {}, > }; > diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h > index d3aba1e6cae8..38672499ca18 100644 > --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h > +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h > @@ -74,6 +74,7 @@ enum mtk_jpeg_ctx_state { > * @out_q_default_fourcc: output queue default fourcc > * @cap_q_default_fourcc: capture queue default fourcc > * @multi_core: mark jpeg hw is multi_core or not > + * @max_hw_count: jpeg hw-core count > * @jpeg_worker: jpeg dec or enc worker > * @support_34bit: flag to check if support dma_address 34bit > */ > @@ -91,6 +92,7 @@ struct mtk_jpeg_variant { > u32 out_q_default_fourcc; > u32 cap_q_default_fourcc; > bool multi_core; > + u32 max_hw_count; > void (*jpeg_worker)(struct work_struct *work); > bool support_34bit; > };
diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c index 77b3bd6c4d3f..4dc6f82d74fa 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c @@ -1468,7 +1468,7 @@ static int mtk_jpegenc_get_hw(struct mtk_jpeg_ctx *ctx) int i; spin_lock_irqsave(&jpeg->hw_lock, flags); - for (i = 0; i < MTK_JPEGENC_HW_MAX; i++) { + for (i = 0; i < jpeg->variant->max_hw_count; i++) { comp_jpeg = jpeg->enc_hw_dev[i]; if (comp_jpeg->hw_state == MTK_JPEG_HW_IDLE) { hw_id = i; @@ -1515,7 +1515,7 @@ static int mtk_jpegdec_get_hw(struct mtk_jpeg_ctx *ctx) int i; spin_lock_irqsave(&jpeg->hw_lock, flags); - for (i = 0; i < MTK_JPEGDEC_HW_MAX; i++) { + for (i = 0; i < jpeg->variant->max_hw_count; i++) { comp_jpeg = jpeg->dec_hw_dev[i]; if (comp_jpeg->hw_state == MTK_JPEG_HW_IDLE) { hw_id = i; @@ -1598,7 +1598,7 @@ static void mtk_jpegenc_worker(struct work_struct *work) jpeg_work); struct mtk_jpeg_dev *jpeg = ctx->jpeg; - for (i = 0; i < MTK_JPEGENC_HW_MAX; i++) + for (i = 0; i < jpeg->variant->max_hw_count; i++) comp_jpeg[i] = jpeg->enc_hw_dev[i]; i = 0; @@ -1696,7 +1696,7 @@ static void mtk_jpegdec_worker(struct work_struct *work) struct mtk_jpeg_fb fb; unsigned long flags; - for (i = 0; i < MTK_JPEGDEC_HW_MAX; i++) + for (i = 0; i < jpeg->variant->max_hw_count; i++) comp_jpeg[i] = jpeg->dec_hw_dev[i]; i = 0; @@ -1925,6 +1925,7 @@ static struct mtk_jpeg_variant mtk8195_jpegenc_drvdata = { .out_q_default_fourcc = V4L2_PIX_FMT_YUYV, .cap_q_default_fourcc = V4L2_PIX_FMT_JPEG, .multi_core = true, + .max_hw_count = 2, .jpeg_worker = mtk_jpegenc_worker, }; @@ -1938,6 +1939,21 @@ static const struct mtk_jpeg_variant mtk8195_jpegdec_drvdata = { .out_q_default_fourcc = V4L2_PIX_FMT_JPEG, .cap_q_default_fourcc = V4L2_PIX_FMT_YUV420M, .multi_core = true, + .max_hw_count = 3, + .jpeg_worker = mtk_jpegdec_worker, +}; + +static const struct mtk_jpeg_variant mtk8196_jpegdec_drvdata = { + .formats = mtk_jpeg_dec_formats, + .num_formats = MTK_JPEG_DEC_NUM_FORMATS, + .qops = &mtk_jpeg_dec_qops, + .m2m_ops = &mtk_jpeg_multicore_dec_m2m_ops, + .dev_name = "mtk-jpeg-dec", + .ioctl_ops = &mtk_jpeg_dec_ioctl_ops, + .out_q_default_fourcc = V4L2_PIX_FMT_JPEG, + .cap_q_default_fourcc = V4L2_PIX_FMT_YUV420M, + .multi_core = true, + .max_hw_count = 2, .jpeg_worker = mtk_jpegdec_worker, }; @@ -1954,6 +1970,7 @@ static const struct mtk_jpeg_variant mtk8188_jpegenc_drvdata = { .ioctl_ops = &mtk_jpeg_enc_ioctl_ops, .out_q_default_fourcc = V4L2_PIX_FMT_YUYV, .cap_q_default_fourcc = V4L2_PIX_FMT_JPEG, + .max_hw_count = 1, .support_34bit = true, }; @@ -1970,6 +1987,7 @@ static const struct mtk_jpeg_variant mtk8188_jpegdec_drvdata = { .ioctl_ops = &mtk_jpeg_dec_ioctl_ops, .out_q_default_fourcc = V4L2_PIX_FMT_JPEG, .cap_q_default_fourcc = V4L2_PIX_FMT_YUV420M, + .max_hw_count = 1, .support_34bit = true, }; @@ -2008,7 +2026,7 @@ static const struct of_device_id mtk_jpeg_match[] = { }, { .compatible = "mediatek,mt8196-jpgdec", - .data = &mtk8195_jpegdec_drvdata, + .data = &mtk8196_jpegdec_drvdata, }, {}, }; diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h index d3aba1e6cae8..38672499ca18 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h @@ -74,6 +74,7 @@ enum mtk_jpeg_ctx_state { * @out_q_default_fourcc: output queue default fourcc * @cap_q_default_fourcc: capture queue default fourcc * @multi_core: mark jpeg hw is multi_core or not + * @max_hw_count: jpeg hw-core count * @jpeg_worker: jpeg dec or enc worker * @support_34bit: flag to check if support dma_address 34bit */ @@ -91,6 +92,7 @@ struct mtk_jpeg_variant { u32 out_q_default_fourcc; u32 cap_q_default_fourcc; bool multi_core; + u32 max_hw_count; void (*jpeg_worker)(struct work_struct *work); bool support_34bit; };
1. different IC has different hw core; 2. use a parameter to set jpeg hw count. Signed-off-by: kyrie.wu <kyrie.wu@mediatek.com> --- .../platform/mediatek/jpeg/mtk_jpeg_core.c | 28 +++++++++++++++---- .../platform/mediatek/jpeg/mtk_jpeg_core.h | 2 ++ 2 files changed, 25 insertions(+), 5 deletions(-)