| Message ID | 20241224-winbond-6-11-rc1-quad-support-v2-0-ad218dbc406f@bootlin.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | spi-nand/spi-mem DTR support | expand |
On Tue, 24 Dec 2024 18:05:45 +0100, Miquel Raynal wrote: > Here is a (big) series supposed to bring DTR support in SPI-NAND. > > I could have split this into two but I eventually preferred showing the > big picture. Once v1 will be over, I can make it two. However when we'll > discuss merging, we'll have to share an immutable tag among the two > subsystems. > > [...] Applied to https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next Thanks! [01/27] spi: spi-mem: Extend spi-mem operations with a per-operation maximum frequency commit: 0fefeade90e74bc8f40ab0e460f483565c492e28 [02/27] spi: spi-mem: Add a new controller capability commit: 1248c9b8d54120950fda10fbeb98fb8932b4d45c [03/27] spi: amd: Support per spi-mem operation frequency switches commit: d0e5faccb229b1dacc4c9fa11f6df33bb1fdabd8 [04/27] spi: amd: Drop redundant check commit: e6204f39fe3a7b4538815a2d778b601bd543649e [05/27] spi: amlogic-spifc-a1: Support per spi-mem operation frequency switches commit: 5baa189789e8894c58eacc7803e3c163c1d0fc0a [06/27] spi: cadence-qspi: Support per spi-mem operation frequency switches commit: 06e9f5a1f6ba774d8942a168d3ec5ed5a008fbcb [07/27] spi: dw: Support per spi-mem operation frequency switches commit: eee7bc9e7ade6f7ac17d9ec02887cd5509ba9427 [08/27] spi: fsl-qspi: Support per spi-mem operation frequency switches commit: 2438db5253eb17a7c0ccb15aea4252a150dda057 [09/27] spi: microchip-core-qspi: Support per spi-mem operation frequency switches commit: 13529647743d906ed3cf991f1d77727e7ff1fb6f [10/27] spi: mt65xx: Support per spi-mem operation frequency switches commit: 13fd04b53053bbfa741a0f2a781837ab80e485f6 [11/27] spi: mxic: Support per spi-mem operation frequency switches commit: 67707cb094f134f5b3931eefbedbb9ca7e3209d0 [12/27] spi: nxp-fspi: Support per spi-mem operation frequency switches commit: 26851cf65ffca2d3a8d529a125e54cf0084d69e7 [13/27] spi: rockchip-sfc: Support per spi-mem operation frequency switches commit: d3f35dd3ad968256ed1080e3ea2022f947861cff [14/27] spi: spi-sn-f-ospi: Support per spi-mem operation frequency switches commit: 1a206344218cc15ad8f321e3abab3f3d36ab639f [15/27] spi: spi-ti-qspi: Support per spi-mem operation frequency switches commit: b2fac3192919dd07e7ce30558e34abd7e07dde77 [16/27] spi: zynq-qspi: Support per spi-mem operation frequency switches commit: 9a68f6c8d6cfddeac7c5874528ed04e50a1cb579 [17/27] spi: zynqmp-gqspi: Support per spi-mem operation frequency switches commit: 30eb2e6e78225f92f04a2325c6fd77fe8f5b4aab [18/27] spi: spi-mem: Reorder spi-mem macro assignments commit: d1f85873d2d62d6980e68d21d3a21f20b0664cc3 [19/27] spi: spi-mem: Create macros for DTR operation commit: f0006897a96c736623ddeb9b68c3880eb5cdebe7 [20/27] spi: spi-mem: Estimate the time taken by operations (no commit info) All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark
Hello Mark, hello MTD folks, Here is a (big) series supposed to bring DTR support in SPI-NAND. I could have split this into two but I eventually preferred showing the big picture. Once v1 will be over, I can make it two. However when we'll discuss merging, we'll have to share an immutable tag among the two subsystems. Here is the logic: * patches 1 & 2 add support for spi-mem operations with a specific frequency limitation. This is not only related to DTR support, because as you can see I could use this to support basic features in the Winbond driver. * patches 3-17 are going through all the easy controller drivers, where effectively supporting these per-operation limitation was easy to do. In practice, I believe all controllers can, but software is sometimes the limiting factor. All controllers without spi-mem support will gracefully handle the request (provided that they already care about the maximum speed of course), and all the updated controllers in this series will also handle the situation correctly. For the others, it's an opt-in parameter, so they will simply refuse the operation during the checks_op/supports_op() phase. * patches 18-20 add DTR support in spi-mem. * patches 21-24 add DTR support in SPI-NAND. * patches 25-27 add DTR support to Winbon chips. --- Changes in v2: - Fixed breakage reported by Mark. - Created an "adjust_op_freq" helper in the core and used it from spi_mem_exec_op(). This way it is called only once. The main parameter must still be casted otherwise we would need to do the call outside of spi_mem_exec_op() which would imply about 40 different changes in the core and drivers and also the assurance that we would get it wrong again later. - Reworked the logic for picking the best variant to include all subtleties due to maximum/supported frequencies. The choice takes slightly longer now but should return the truly fastest variant for each case. - Removed unique parenthesis in some kdoc comment. - Fixed the inconsistency when handling the maximum per operation frequencies between spi-mem and non spi-mem controllers. - Fixed many typos. - Added a core check to validate the per op frequency against the minimum supported frequencies by controller drivers. - Removed a useless check from the amd driver and turned a function void. Also used the controller parameters in this driver rather than the top-level definitions. - Clarified some of the commit logs. - Collected tags. - Prevented a patch from being picked-up automatically by the stable team. - Reordered some terms in macros in the spi-mem core. - Rebased on top of v6.13-rc1. - Link to v1: https://lore.kernel.org/r/20241025161501.485684-1-miquel.raynal@bootlin.com --- Miquel Raynal (27): spi: spi-mem: Extend spi-mem operations with a per-operation maximum frequency spi: spi-mem: Add a new controller capability spi: amd: Support per spi-mem operation frequency switches spi: amd: Drop redundant check spi: amlogic-spifc-a1: Support per spi-mem operation frequency switches spi: cadence-qspi: Support per spi-mem operation frequency switches spi: dw: Support per spi-mem operation frequency switches spi: fsl-qspi: Support per spi-mem operation frequency switches spi: microchip-core-qspi: Support per spi-mem operation frequency switches spi: mt65xx: Support per spi-mem operation frequency switches spi: mxic: Support per spi-mem operation frequency switches spi: nxp-fspi: Support per spi-mem operation frequency switches spi: rockchip-sfc: Support per spi-mem operation frequency switches spi: spi-sn-f-ospi: Support per spi-mem operation frequency switches spi: spi-ti-qspi: Support per spi-mem operation frequency switches spi: zynq-qspi: Support per spi-mem operation frequency switches spi: zynqmp-gqspi: Support per spi-mem operation frequency switches spi: spi-mem: Reorder spi-mem macro assignments spi: spi-mem: Create macros for DTR operation spi: spi-mem: Estimate the time taken by operations mtd: spinand: Create distinct fast and slow read from cache variants mtd: spinand: Add an optional frequency to read from cache macros mtd: spinand: Enhance the logic when picking a variant mtd: spinand: Add support for read DTR operations mtd: spinand: winbond: Update the *JW chip definitions mtd: spinand: winbond: Add comment about naming mtd: spinand: winbond: Add support for DTR operations drivers/mtd/nand/spi/alliancememory.c | 4 +-- drivers/mtd/nand/spi/ato.c | 4 +-- drivers/mtd/nand/spi/core.c | 15 ++++++-- drivers/mtd/nand/spi/esmt.c | 4 +-- drivers/mtd/nand/spi/foresee.c | 4 +-- drivers/mtd/nand/spi/gigadevice.c | 16 ++++----- drivers/mtd/nand/spi/macronix.c | 4 +-- drivers/mtd/nand/spi/micron.c | 8 ++--- drivers/mtd/nand/spi/paragon.c | 4 +-- drivers/mtd/nand/spi/toshiba.c | 4 +-- drivers/mtd/nand/spi/winbond.c | 27 ++++++++++++--- drivers/mtd/nand/spi/xtx.c | 4 +-- drivers/spi/spi-amd.c | 21 ++++++------ drivers/spi/spi-amlogic-spifc-a1.c | 7 +++- drivers/spi/spi-cadence-quadspi.c | 3 +- drivers/spi/spi-dw-core.c | 10 ++++-- drivers/spi/spi-fsl-qspi.c | 12 +++++-- drivers/spi/spi-mem.c | 64 +++++++++++++++++++++++++++++++++++ drivers/spi/spi-microchip-core-qspi.c | 26 +++++++++++--- drivers/spi/spi-mt65xx.c | 7 +++- drivers/spi/spi-mxic.c | 3 +- drivers/spi/spi-nxp-fspi.c | 12 +++++-- drivers/spi/spi-rockchip-sfc.c | 11 ++++-- drivers/spi/spi-sn-f-ospi.c | 8 +++-- drivers/spi/spi-ti-qspi.c | 7 +++- drivers/spi/spi-zynq-qspi.c | 13 +++++-- drivers/spi/spi-zynqmp-gqspi.c | 13 ++++--- include/linux/mtd/spinand.h | 58 ++++++++++++++++++++++++++++--- include/linux/spi/spi-mem.h | 56 +++++++++++++++++++++++++++++- 29 files changed, 349 insertions(+), 80 deletions(-) --- base-commit: 9100187b36091e5cc046d1f415f50a04ec31c25f change-id: 20241210-winbond-6-11-rc1-quad-support-0148205a21a2 Best regards,