diff mbox series

[net-next,06/10] bnxt_en: Refactor RX/RX AGG ring parameters setup for P5_PLUS

Message ID 20250113063927.4017173-7-michael.chan@broadcom.com (mailing list archive)
State New
Delegated to: Netdev Maintainers
Headers show
Series bnxt_en: Add NPAR 1.2 and TPH support | expand

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netdev/fixes_present success Fixes tag not required for -next series
netdev/header_inline success No static functions without inline keyword in header files
netdev/build_32bit success Errors and warnings before: 1 this patch: 1
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netdev/deprecated_api success None detected
netdev/check_selftest success No net selftest shell script
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Commit Message

Michael Chan Jan. 13, 2025, 6:39 a.m. UTC 
There is some common code for setting up RX and RX AGG ring allocation
parameters for P5_PLUS chips.  Refactor the logic into a new function.

Reviewed-by: Hongguang Gao <hongguang.gao@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Signed-off-by: Michael Chan <michael.chan@broadcom.com>
---
 drivers/net/ethernet/broadcom/bnxt/bnxt.c | 58 +++++++++++------------
 1 file changed, 28 insertions(+), 30 deletions(-)

Comments

Michal Swiatkowski Jan. 13, 2025, 8:27 a.m. UTC | #1 
On Sun, Jan 12, 2025 at 10:39:23PM -0800, Michael Chan wrote:
> There is some common code for setting up RX and RX AGG ring allocation
> parameters for P5_PLUS chips.  Refactor the logic into a new function.
> 
> Reviewed-by: Hongguang Gao <hongguang.gao@broadcom.com>
> Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
> Signed-off-by: Michael Chan <michael.chan@broadcom.com>
> ---
>  drivers/net/ethernet/broadcom/bnxt/bnxt.c | 58 +++++++++++------------
>  1 file changed, 28 insertions(+), 30 deletions(-)
> 
> diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.c b/drivers/net/ethernet/broadcom/bnxt/bnxt.c
> index 4336a5b54289..c862250d3b77 100644
> --- a/drivers/net/ethernet/broadcom/bnxt/bnxt.c
> +++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.c
> @@ -6917,6 +6917,28 @@ static void bnxt_hwrm_ring_grp_free(struct bnxt *bp)
>  	hwrm_req_drop(bp, req);
>  }
>  
> +static void bnxt_set_rx_ring_params_p5(struct bnxt *bp, u32 ring_type,
> +				       struct hwrm_ring_alloc_input *req,
> +				       struct bnxt_ring_struct *ring)
> +{
> +	struct bnxt_ring_grp_info *grp_info = &bp->grp_info[ring->grp_idx];
> +	u32 enables = RING_ALLOC_REQ_ENABLES_RX_BUF_SIZE_VALID;
> +
> +	if (ring_type == HWRM_RING_ALLOC_AGG) {
> +		req->ring_type = RING_ALLOC_REQ_RING_TYPE_RX_AGG;
> +		req->rx_ring_id = cpu_to_le16(grp_info->rx_fw_ring_id);
> +		req->rx_buf_size = cpu_to_le16(BNXT_RX_PAGE_SIZE);
> +		enables |= RING_ALLOC_REQ_ENABLES_RX_RING_ID_VALID;
> +	} else {
> +		req->rx_buf_size = cpu_to_le16(bp->rx_buf_use_size);
> +		if (NET_IP_ALIGN == 2)
> +			req->flags =
> +				cpu_to_le16(RING_ALLOC_REQ_FLAGS_RX_SOP_PAD);
> +	}
> +	req->stat_ctx_id = cpu_to_le32(grp_info->fw_stats_ctx);
> +	req->enables |= cpu_to_le32(enables);
> +}
> +
>  static int hwrm_ring_alloc_send_msg(struct bnxt *bp,
>  				    struct bnxt_ring_struct *ring,
>  				    u32 ring_type, u32 map_index)
> @@ -6968,37 +6990,13 @@ static int hwrm_ring_alloc_send_msg(struct bnxt *bp,
>  		break;
>  	}
>  	case HWRM_RING_ALLOC_RX:
> -		req->ring_type = RING_ALLOC_REQ_RING_TYPE_RX;
> -		req->length = cpu_to_le32(bp->rx_ring_mask + 1);
> -		if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {
> -			u16 flags = 0;
> -
> -			/* Association of rx ring with stats context */
> -			grp_info = &bp->grp_info[ring->grp_idx];
> -			req->rx_buf_size = cpu_to_le16(bp->rx_buf_use_size);
> -			req->stat_ctx_id = cpu_to_le32(grp_info->fw_stats_ctx);
> -			req->enables |= cpu_to_le32(
> -				RING_ALLOC_REQ_ENABLES_RX_BUF_SIZE_VALID);
> -			if (NET_IP_ALIGN == 2)
> -				flags = RING_ALLOC_REQ_FLAGS_RX_SOP_PAD;
> -			req->flags = cpu_to_le16(flags);
> -		}
> -		break;
>  	case HWRM_RING_ALLOC_AGG:
> -		if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {
> -			req->ring_type = RING_ALLOC_REQ_RING_TYPE_RX_AGG;
> -			/* Association of agg ring with rx ring */
> -			grp_info = &bp->grp_info[ring->grp_idx];
> -			req->rx_ring_id = cpu_to_le16(grp_info->rx_fw_ring_id);
> -			req->rx_buf_size = cpu_to_le16(BNXT_RX_PAGE_SIZE);
> -			req->stat_ctx_id = cpu_to_le32(grp_info->fw_stats_ctx);
> -			req->enables |= cpu_to_le32(
> -				RING_ALLOC_REQ_ENABLES_RX_RING_ID_VALID |
> -				RING_ALLOC_REQ_ENABLES_RX_BUF_SIZE_VALID);
> -		} else {
> -			req->ring_type = RING_ALLOC_REQ_RING_TYPE_RX;
> -		}
> -		req->length = cpu_to_le32(bp->rx_agg_ring_mask + 1);
> +		req->ring_type = RING_ALLOC_REQ_RING_TYPE_RX;
> +		req->length = (ring_type == HWRM_RING_ALLOC_RX) ?
> +			      cpu_to_le32(bp->rx_ring_mask + 1) :
> +			      cpu_to_le32(bp->rx_agg_ring_mask + 1);
> +		if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)
> +			bnxt_set_rx_ring_params_p5(bp, ring_type, req, ring);
>  		break;
>  	case HWRM_RING_ALLOC_CMPL:
>  		req->ring_type = RING_ALLOC_REQ_RING_TYPE_L2_CMPL;
> -- 
> 2.30.1

Reviewed-by: Michal Swiatkowski <michal.swiatkowski@linux.intel.com>
diff mbox series

Patch

diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.c b/drivers/net/ethernet/broadcom/bnxt/bnxt.c
index 4336a5b54289..c862250d3b77 100644
--- a/drivers/net/ethernet/broadcom/bnxt/bnxt.c
+++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.c
@@ -6917,6 +6917,28 @@  static void bnxt_hwrm_ring_grp_free(struct bnxt *bp)
 	hwrm_req_drop(bp, req);
 }
 
+static void bnxt_set_rx_ring_params_p5(struct bnxt *bp, u32 ring_type,
+				       struct hwrm_ring_alloc_input *req,
+				       struct bnxt_ring_struct *ring)
+{
+	struct bnxt_ring_grp_info *grp_info = &bp->grp_info[ring->grp_idx];
+	u32 enables = RING_ALLOC_REQ_ENABLES_RX_BUF_SIZE_VALID;
+
+	if (ring_type == HWRM_RING_ALLOC_AGG) {
+		req->ring_type = RING_ALLOC_REQ_RING_TYPE_RX_AGG;
+		req->rx_ring_id = cpu_to_le16(grp_info->rx_fw_ring_id);
+		req->rx_buf_size = cpu_to_le16(BNXT_RX_PAGE_SIZE);
+		enables |= RING_ALLOC_REQ_ENABLES_RX_RING_ID_VALID;
+	} else {
+		req->rx_buf_size = cpu_to_le16(bp->rx_buf_use_size);
+		if (NET_IP_ALIGN == 2)
+			req->flags =
+				cpu_to_le16(RING_ALLOC_REQ_FLAGS_RX_SOP_PAD);
+	}
+	req->stat_ctx_id = cpu_to_le32(grp_info->fw_stats_ctx);
+	req->enables |= cpu_to_le32(enables);
+}
+
 static int hwrm_ring_alloc_send_msg(struct bnxt *bp,
 				    struct bnxt_ring_struct *ring,
 				    u32 ring_type, u32 map_index)
@@ -6968,37 +6990,13 @@  static int hwrm_ring_alloc_send_msg(struct bnxt *bp,
 		break;
 	}
 	case HWRM_RING_ALLOC_RX:
-		req->ring_type = RING_ALLOC_REQ_RING_TYPE_RX;
-		req->length = cpu_to_le32(bp->rx_ring_mask + 1);
-		if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {
-			u16 flags = 0;
-
-			/* Association of rx ring with stats context */
-			grp_info = &bp->grp_info[ring->grp_idx];
-			req->rx_buf_size = cpu_to_le16(bp->rx_buf_use_size);
-			req->stat_ctx_id = cpu_to_le32(grp_info->fw_stats_ctx);
-			req->enables |= cpu_to_le32(
-				RING_ALLOC_REQ_ENABLES_RX_BUF_SIZE_VALID);
-			if (NET_IP_ALIGN == 2)
-				flags = RING_ALLOC_REQ_FLAGS_RX_SOP_PAD;
-			req->flags = cpu_to_le16(flags);
-		}
-		break;
 	case HWRM_RING_ALLOC_AGG:
-		if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {
-			req->ring_type = RING_ALLOC_REQ_RING_TYPE_RX_AGG;
-			/* Association of agg ring with rx ring */
-			grp_info = &bp->grp_info[ring->grp_idx];
-			req->rx_ring_id = cpu_to_le16(grp_info->rx_fw_ring_id);
-			req->rx_buf_size = cpu_to_le16(BNXT_RX_PAGE_SIZE);
-			req->stat_ctx_id = cpu_to_le32(grp_info->fw_stats_ctx);
-			req->enables |= cpu_to_le32(
-				RING_ALLOC_REQ_ENABLES_RX_RING_ID_VALID |
-				RING_ALLOC_REQ_ENABLES_RX_BUF_SIZE_VALID);
-		} else {
-			req->ring_type = RING_ALLOC_REQ_RING_TYPE_RX;
-		}
-		req->length = cpu_to_le32(bp->rx_agg_ring_mask + 1);
+		req->ring_type = RING_ALLOC_REQ_RING_TYPE_RX;
+		req->length = (ring_type == HWRM_RING_ALLOC_RX) ?
+			      cpu_to_le32(bp->rx_ring_mask + 1) :
+			      cpu_to_le32(bp->rx_agg_ring_mask + 1);
+		if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)
+			bnxt_set_rx_ring_params_p5(bp, ring_type, req, ring);
 		break;
 	case HWRM_RING_ALLOC_CMPL:
 		req->ring_type = RING_ALLOC_REQ_RING_TYPE_L2_CMPL;