| Message ID | 20250113-imx8m-clk-v3-1-0d6e9bdeaa4e@pengutronix.de (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | arm64: dts: freescale: imx8mp-skov: switch to nominal drive mode | expand |
On Mon, Jan 13, 2025 at 02:42:51PM +0100, Ahmad Fatoum wrote: > The imx8m-clock.yaml binding covers the clock controller inside all > of the i.MX8M Q/M/N/P SoCs. All of them have in common that they > support two operating modes: nominal and overdrive mode. > > While the overdrive mode allows for higher frequencies for many IPs, > the nominal mode needs a lower SoC voltage, thereby reducing > heat generation and power usage. > > As increasing clock rates beyond the maximum permitted by the supplied > SoC voltage can lead to difficult to debug issues, device tree consumers > would benefit from knowing what mode is active to enforce the clock rate > limits that come with it. > > To facilitate this, extend the clock controller bindings with an > optional fsl,operating-mode property. This intentionally allows the > absence of the property, because there is no default suitable for all > boards: > > For i.MX8M Mini and Nano, the kernel SoC DTSIs has assigned-clock-rates > that are all achievable in nominal mode. For i.MX8MP, there are some > rates only validated for overdrive mode. > > But even for the i.MX8M Mini/Nano boards, we don't know what rates they > may configure at runtime, so it has not been possible so far to infer from > just the device tree what the mode is. > > Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> > --- > Documentation/devicetree/bindings/clock/imx8m-clock.yaml | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/imx8m-clock.yaml b/Documentation/devicetree/bindings/clock/imx8m-clock.yaml > index c643d4a814786a1fc7e559140fe58911990f71bb..b03672255cae9462013a8a4e7a2adaff440f1420 100644 > --- a/Documentation/devicetree/bindings/clock/imx8m-clock.yaml > +++ b/Documentation/devicetree/bindings/clock/imx8m-clock.yaml > @@ -43,6 +43,16 @@ properties: > ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8m-clock.h > for the full list of i.MX8M clock IDs. > > + fsl,operating-mode: > + $ref: /schemas/types.yaml#/definitions/string > + description: > + The operating mode of the SoC. This affects the maximum clock rates that > + can safely be configured by the clock controller. > + oneOf: > + - enum: > + - nominal > + - overdrive I remember fsl,operating-mode: enum: [nominal, overdrive] should work without oneOf Frank > + > required: > - compatible > - reg > @@ -109,6 +119,7 @@ examples: > <&clk_ext3>, <&clk_ext4>; > clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2", > "clk_ext3", "clk_ext4"; > + fsl,operating-mode = "nominal"; > }; > > - | > > -- > 2.39.5 >
On 13.01.25 16:58, Frank Li wrote: > On Mon, Jan 13, 2025 at 02:42:51PM +0100, Ahmad Fatoum wrote: >> The imx8m-clock.yaml binding covers the clock controller inside all >> of the i.MX8M Q/M/N/P SoCs. All of them have in common that they >> support two operating modes: nominal and overdrive mode. >> >> While the overdrive mode allows for higher frequencies for many IPs, >> the nominal mode needs a lower SoC voltage, thereby reducing >> heat generation and power usage. >> >> As increasing clock rates beyond the maximum permitted by the supplied >> SoC voltage can lead to difficult to debug issues, device tree consumers >> would benefit from knowing what mode is active to enforce the clock rate >> limits that come with it. >> >> To facilitate this, extend the clock controller bindings with an >> optional fsl,operating-mode property. This intentionally allows the >> absence of the property, because there is no default suitable for all >> boards: >> >> For i.MX8M Mini and Nano, the kernel SoC DTSIs has assigned-clock-rates >> that are all achievable in nominal mode. For i.MX8MP, there are some >> rates only validated for overdrive mode. >> >> But even for the i.MX8M Mini/Nano boards, we don't know what rates they >> may configure at runtime, so it has not been possible so far to infer from >> just the device tree what the mode is. >> >> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> >> --- >> Documentation/devicetree/bindings/clock/imx8m-clock.yaml | 11 +++++++++++ >> 1 file changed, 11 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/clock/imx8m-clock.yaml b/Documentation/devicetree/bindings/clock/imx8m-clock.yaml >> index c643d4a814786a1fc7e559140fe58911990f71bb..b03672255cae9462013a8a4e7a2adaff440f1420 100644 >> --- a/Documentation/devicetree/bindings/clock/imx8m-clock.yaml >> +++ b/Documentation/devicetree/bindings/clock/imx8m-clock.yaml >> @@ -43,6 +43,16 @@ properties: >> ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8m-clock.h >> for the full list of i.MX8M clock IDs. >> >> + fsl,operating-mode: >> + $ref: /schemas/types.yaml#/definitions/string >> + description: >> + The operating mode of the SoC. This affects the maximum clock rates that >> + can safely be configured by the clock controller. >> + oneOf: >> + - enum: >> + - nominal >> + - overdrive > > I remember > > fsl,operating-mode: > enum: [nominal, overdrive] > > should work without oneOf Yes, you're right. This is a left-over from the example I copy-pasted from. Thanks, will fix for v4. Feel free to leave some Reviewed-by on the other patches though in the mean-time. :-) Cheers, Ahmad > > Frank > > >> + >> required: >> - compatible >> - reg >> @@ -109,6 +119,7 @@ examples: >> <&clk_ext3>, <&clk_ext4>; >> clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2", >> "clk_ext3", "clk_ext4"; >> + fsl,operating-mode = "nominal"; >> }; >> >> - | >> >> -- >> 2.39.5 >> >
On Mon, Jan 13, 2025 at 02:42:51PM +0100, Ahmad Fatoum wrote: > > + fsl,operating-mode: > + $ref: /schemas/types.yaml#/definitions/string > + description: > + The operating mode of the SoC. This affects the maximum clock rates that > + can safely be configured by the clock controller. > + oneOf: > + - enum: Just enum, no need for oneOf. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/clock/imx8m-clock.yaml b/Documentation/devicetree/bindings/clock/imx8m-clock.yaml index c643d4a814786a1fc7e559140fe58911990f71bb..b03672255cae9462013a8a4e7a2adaff440f1420 100644 --- a/Documentation/devicetree/bindings/clock/imx8m-clock.yaml +++ b/Documentation/devicetree/bindings/clock/imx8m-clock.yaml @@ -43,6 +43,16 @@ properties: ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8m-clock.h for the full list of i.MX8M clock IDs. + fsl,operating-mode: + $ref: /schemas/types.yaml#/definitions/string + description: + The operating mode of the SoC. This affects the maximum clock rates that + can safely be configured by the clock controller. + oneOf: + - enum: + - nominal + - overdrive + required: - compatible - reg @@ -109,6 +119,7 @@ examples: <&clk_ext3>, <&clk_ext4>; clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2", "clk_ext3", "clk_ext4"; + fsl,operating-mode = "nominal"; }; - |
The imx8m-clock.yaml binding covers the clock controller inside all of the i.MX8M Q/M/N/P SoCs. All of them have in common that they support two operating modes: nominal and overdrive mode. While the overdrive mode allows for higher frequencies for many IPs, the nominal mode needs a lower SoC voltage, thereby reducing heat generation and power usage. As increasing clock rates beyond the maximum permitted by the supplied SoC voltage can lead to difficult to debug issues, device tree consumers would benefit from knowing what mode is active to enforce the clock rate limits that come with it. To facilitate this, extend the clock controller bindings with an optional fsl,operating-mode property. This intentionally allows the absence of the property, because there is no default suitable for all boards: For i.MX8M Mini and Nano, the kernel SoC DTSIs has assigned-clock-rates that are all achievable in nominal mode. For i.MX8MP, there are some rates only validated for overdrive mode. But even for the i.MX8M Mini/Nano boards, we don't know what rates they may configure at runtime, so it has not been possible so far to infer from just the device tree what the mode is. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> --- Documentation/devicetree/bindings/clock/imx8m-clock.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+)