diff mbox series

[net,1/2] net: pcs: xpcs: fix DW_VR_MII_DIG_CTRL1_2G5_EN bit being set for 1G SGMII w/o inband

Message ID 20250114164721.2879380-1-vladimir.oltean@nxp.com (mailing list archive)
State Accepted
Commit 5c71729ab92c7e710d48ed93043a2d1e35cc8d3c
Delegated to: Netdev Maintainers
Headers show
Series [net,1/2] net: pcs: xpcs: fix DW_VR_MII_DIG_CTRL1_2G5_EN bit being set for 1G SGMII w/o inband | expand

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netdev/series_format success Single patches do not need cover letters
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netdev/ynl success Generated files up to date; no warnings/errors; no diff in generated;
netdev/fixes_present success Fixes tag present in non-next series
netdev/header_inline success No static functions without inline keyword in header files
netdev/build_32bit success Errors and warnings before: 1 this patch: 1
netdev/build_tools success No tools touched, skip
netdev/cc_maintainers success CCed 8 of 8 maintainers
netdev/build_clang success Errors and warnings before: 2 this patch: 2
netdev/verify_signedoff success Signed-off-by tag matches author and committer
netdev/deprecated_api success None detected
netdev/check_selftest success No net selftest shell script
netdev/verify_fixes success Fixes tag looks correct
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netdev/build_clang_rust success No Rust files in patch. Skipping build
netdev/kdoc success Errors and warnings before: 0 this patch: 0
netdev/source_inline success Was 0 now: 0
netdev/contest success net-next-2025-01-15--18-00 (tests: 886)

Commit Message

Vladimir Oltean Jan. 14, 2025, 4:47 p.m. UTC
On a port with SGMII fixed-link at SPEED_1000, DW_VR_MII_DIG_CTRL1 gets
set to 0x2404. This is incorrect, because bit 2 (DW_VR_MII_DIG_CTRL1_2G5_EN)
is set.

It comes from the previous write to DW_VR_MII_AN_CTRL, because the "val"
variable is reused and is dirty. Actually, its value is 0x4, aka
FIELD_PREP(DW_VR_MII_PCS_MODE_MASK, DW_VR_MII_PCS_MODE_C37_SGMII).

Resolve the issue by clearing "val" to 0 when writing to a new register.
After the fix, the register value is 0x2400.

Prior to the blamed commit, when the read-modify-write was open-coded,
the code saved the content of the DW_VR_MII_DIG_CTRL1 register in the
"ret" variable.

Fixes: ce8d6081fcf4 ("net: pcs: xpcs: add _modify() accessors")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
---
 drivers/net/pcs/pcs-xpcs.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Maxime Chevallier Jan. 15, 2025, 2:37 p.m. UTC | #1
Hello Vlad,

On Tue, 14 Jan 2025 18:47:20 +0200
Vladimir Oltean <vladimir.oltean@nxp.com> wrote:

> On a port with SGMII fixed-link at SPEED_1000, DW_VR_MII_DIG_CTRL1 gets
> set to 0x2404. This is incorrect, because bit 2 (DW_VR_MII_DIG_CTRL1_2G5_EN)
> is set.
> 
> It comes from the previous write to DW_VR_MII_AN_CTRL, because the "val"
> variable is reused and is dirty. Actually, its value is 0x4, aka
> FIELD_PREP(DW_VR_MII_PCS_MODE_MASK, DW_VR_MII_PCS_MODE_C37_SGMII).
> 
> Resolve the issue by clearing "val" to 0 when writing to a new register.
> After the fix, the register value is 0x2400.
> 
> Prior to the blamed commit, when the read-modify-write was open-coded,
> the code saved the content of the DW_VR_MII_DIG_CTRL1 register in the
> "ret" variable.
> 
> Fixes: ce8d6081fcf4 ("net: pcs: xpcs: add _modify() accessors")
> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>

Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com>

Thanks,

Maxime
Russell King (Oracle) Jan. 15, 2025, 2:43 p.m. UTC | #2
On Tue, Jan 14, 2025 at 06:47:20PM +0200, Vladimir Oltean wrote:
> On a port with SGMII fixed-link at SPEED_1000, DW_VR_MII_DIG_CTRL1 gets
> set to 0x2404. This is incorrect, because bit 2 (DW_VR_MII_DIG_CTRL1_2G5_EN)
> is set.
> 
> It comes from the previous write to DW_VR_MII_AN_CTRL, because the "val"
> variable is reused and is dirty. Actually, its value is 0x4, aka
> FIELD_PREP(DW_VR_MII_PCS_MODE_MASK, DW_VR_MII_PCS_MODE_C37_SGMII).
> 
> Resolve the issue by clearing "val" to 0 when writing to a new register.
> After the fix, the register value is 0x2400.
> 
> Prior to the blamed commit, when the read-modify-write was open-coded,
> the code saved the content of the DW_VR_MII_DIG_CTRL1 register in the
> "ret" variable.
> 
> Fixes: ce8d6081fcf4 ("net: pcs: xpcs: add _modify() accessors")
> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>

Good catch!

Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>

Thanks!
patchwork-bot+netdevbpf@kernel.org Jan. 15, 2025, 9:30 p.m. UTC | #3
Hello:

This series was applied to netdev/net.git (main)
by Jakub Kicinski <kuba@kernel.org>:

On Tue, 14 Jan 2025 18:47:20 +0200 you wrote:
> On a port with SGMII fixed-link at SPEED_1000, DW_VR_MII_DIG_CTRL1 gets
> set to 0x2404. This is incorrect, because bit 2 (DW_VR_MII_DIG_CTRL1_2G5_EN)
> is set.
> 
> It comes from the previous write to DW_VR_MII_AN_CTRL, because the "val"
> variable is reused and is dirty. Actually, its value is 0x4, aka
> FIELD_PREP(DW_VR_MII_PCS_MODE_MASK, DW_VR_MII_PCS_MODE_C37_SGMII).
> 
> [...]

Here is the summary with links:
  - [net,1/2] net: pcs: xpcs: fix DW_VR_MII_DIG_CTRL1_2G5_EN bit being set for 1G SGMII w/o inband
    https://git.kernel.org/netdev/net/c/5c71729ab92c
  - [net,2/2] net: pcs: xpcs: actively unset DW_VR_MII_DIG_CTRL1_2G5_EN for 1G SGMII
    https://git.kernel.org/netdev/net/c/d6e3316a1680

You are awesome, thank you!
diff mbox series

Patch

diff --git a/drivers/net/pcs/pcs-xpcs.c b/drivers/net/pcs/pcs-xpcs.c
index e270a75a988c..3de0a25a1eca 100644
--- a/drivers/net/pcs/pcs-xpcs.c
+++ b/drivers/net/pcs/pcs-xpcs.c
@@ -728,6 +728,7 @@  static int xpcs_config_aneg_c37_sgmii(struct dw_xpcs *xpcs,
 	if (ret < 0)
 		return ret;
 
+	val = 0;
 	mask = DW_VR_MII_DIG_CTRL1_MAC_AUTO_SW;
 	if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
 		val = DW_VR_MII_DIG_CTRL1_MAC_AUTO_SW;