| Message ID | 20250115175927.3714357-2-niklas.soderlund+renesas@ragnatech.se (mailing list archive) |
|---|---|
| State | New |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | clk: renesas: r8a779h0: Add FCPVX and VSPX clocks | expand |
Hi Niklas, On Wed, Jan 15, 2025 at 6:59 PM Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> wrote: > Add the FCPVX modules clock for Renesas R-Car V4M. > > Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Thanks for your patch! Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-clk for v6.15. > --- a/drivers/clk/renesas/r8a779h0-cpg-mssr.c > +++ b/drivers/clk/renesas/r8a779h0-cpg-mssr.c > @@ -239,6 +239,7 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] __initconst = { > DEF_MOD("pfc1", 916, R8A779H0_CLK_CP), > DEF_MOD("pfc2", 917, R8A779H0_CLK_CP), > DEF_MOD("tsc2:tsc1", 919, R8A779H0_CLK_CL16M), > + DEF_MOD("fcpvx0", 1100, R8A779H0_CLK_S0D4_VIO), Any specific reason you are not using S0D1, like on R-Car V4H? I can update this while applying. > DEF_MOD("ssiu", 2926, R8A779H0_CLK_S0D6_PER), > DEF_MOD("ssi", 2927, R8A779H0_CLK_S0D6_PER), Gr{oetje,eeting}s, Geert
Hello Geert, Thanks for your feedback. On 2025-01-17 17:29:21 +0100, Geert Uytterhoeven wrote: > Hi Niklas, > > On Wed, Jan 15, 2025 at 6:59 PM Niklas Söderlund > <niklas.soderlund+renesas@ragnatech.se> wrote: > > Add the FCPVX modules clock for Renesas R-Car V4M. > > > > Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> > > Thanks for your patch! > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > i.e. will queue in renesas-clk for v6.15. > > > --- a/drivers/clk/renesas/r8a779h0-cpg-mssr.c > > +++ b/drivers/clk/renesas/r8a779h0-cpg-mssr.c > > @@ -239,6 +239,7 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] __initconst = { > > DEF_MOD("pfc1", 916, R8A779H0_CLK_CP), > > DEF_MOD("pfc2", 917, R8A779H0_CLK_CP), > > DEF_MOD("tsc2:tsc1", 919, R8A779H0_CLK_CL16M), > > + DEF_MOD("fcpvx0", 1100, R8A779H0_CLK_S0D4_VIO), > > Any specific reason you are not using S0D1, like on R-Car V4H? > I can update this while applying. Nice catch it should be S0D1. I picked it since it listed both FCPVX and VSPX, and I compared it to S0D2 which only lists FCPVX. Checking the datasheet again now after your feedback I see indeed S0D1 also lists both FCPVX and VSPX. Thanks for fixing this while applying, same comment for 2/2. > > > DEF_MOD("ssiu", 2926, R8A779H0_CLK_S0D6_PER), > > DEF_MOD("ssi", 2927, R8A779H0_CLK_S0D6_PER), > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds
diff --git a/drivers/clk/renesas/r8a779h0-cpg-mssr.c b/drivers/clk/renesas/r8a779h0-cpg-mssr.c index 4c8052ac32df..b92990f5ec44 100644 --- a/drivers/clk/renesas/r8a779h0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779h0-cpg-mssr.c @@ -239,6 +239,7 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] __initconst = { DEF_MOD("pfc1", 916, R8A779H0_CLK_CP), DEF_MOD("pfc2", 917, R8A779H0_CLK_CP), DEF_MOD("tsc2:tsc1", 919, R8A779H0_CLK_CL16M), + DEF_MOD("fcpvx0", 1100, R8A779H0_CLK_S0D4_VIO), DEF_MOD("ssiu", 2926, R8A779H0_CLK_S0D6_PER), DEF_MOD("ssi", 2927, R8A779H0_CLK_S0D6_PER), };
Add the FCPVX modules clock for Renesas R-Car V4M. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> --- drivers/clk/renesas/r8a779h0-cpg-mssr.c | 1 + 1 file changed, 1 insertion(+)