Message ID | 20250121092255.3108495-2-lukasz.czechowski@thaumatec.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | Disable DMA on secondary UART on PX30 Ringneck | expand |
Hi Lukasz, On 1/21/25 10:22 AM, Lukasz Czechowski wrote: > In the PX30-uQ7 (Ringneck) SoM, the hardware CTS and RTS pins for > uart5 cannot be used for the UART CTS/RTS, because they are already > allocated for different purposes. CTS pin is routed to SUS_S3# > signal, while RTS pin is used internally and is not available on > Q7 connector. Move definition of the pinctrl-0 property from > px30-ringneck-haikou.dts to px30-ringneck.dtsi. > > Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Considering that I'll request the next patch to be backported to stable releases, we should probably backport this one as well to avoid a git conflict? c.f. https://www.kernel.org/doc/html/latest/process/submitting-patches.html#select-the-recipients-for-your-patch Essentially: Cc: stable@vger.kernel.org @Heiko, this one patch isn't really a genuine candidate for stable backport as it's just moving things around but it'll result in a git conflict when backporting the other patch, how is it usually done for stable releases? Thanks! Quentin
Am Dienstag, 21. Januar 2025, 10:36:15 CET schrieb Quentin Schulz: > Hi Lukasz, > > On 1/21/25 10:22 AM, Lukasz Czechowski wrote: > > In the PX30-uQ7 (Ringneck) SoM, the hardware CTS and RTS pins for > > uart5 cannot be used for the UART CTS/RTS, because they are already > > allocated for different purposes. CTS pin is routed to SUS_S3# > > signal, while RTS pin is used internally and is not available on > > Q7 connector. Move definition of the pinctrl-0 property from > > px30-ringneck-haikou.dts to px30-ringneck.dtsi. > > > > Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com> > > Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> > > Considering that I'll request the next patch to be backported to stable > releases, we should probably backport this one as well to avoid a git > conflict? > > c.f. > https://www.kernel.org/doc/html/latest/process/submitting-patches.html#select-the-recipients-for-your-patch > > Essentially: Cc: stable@vger.kernel.org > > @Heiko, this one patch isn't really a genuine candidate for stable > backport as it's just moving things around but it'll result in a git > conflict when backporting the other patch, how is it usually done for > stable releases? Just Cc-stable and possibly explain it being a dependency in the commit message. And patch2 should ideally get a Fixes tag
diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts b/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts index e4517f47d519c..eb9470a00e549 100644 --- a/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts +++ b/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts @@ -226,7 +226,6 @@ &uart0 { }; &uart5 { - pinctrl-0 = <&uart5_xfer>; rts-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi b/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi index ae050cc6cd050..2c87005c89bd3 100644 --- a/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi @@ -396,6 +396,10 @@ &u2phy_host { status = "okay"; }; +&uart5 { + pinctrl-0 = <&uart5_xfer>; +}; + /* Mule UCAN */ &usb_host0_ehci { status = "okay";
In the PX30-uQ7 (Ringneck) SoM, the hardware CTS and RTS pins for uart5 cannot be used for the UART CTS/RTS, because they are already allocated for different purposes. CTS pin is routed to SUS_S3# signal, while RTS pin is used internally and is not available on Q7 connector. Move definition of the pinctrl-0 property from px30-ringneck-haikou.dts to px30-ringneck.dtsi. Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com> --- arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts | 1 - arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi | 4 ++++ 2 files changed, 4 insertions(+), 1 deletion(-)