| Message ID | 20250124101038.3871768-3-krishna.chundru@oss.qualcomm.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | schemas: pci: bridge: Document PCI L0s & L1 entry delay and N_FTS | expand |
On Fri, Jan 24, 2025 at 4:11 AM Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> wrote: > > Per PCIe r6.0, sec 4.2.5.1, during Link training, a PCIe component > captures the N_FTS value it receives. Per 4.2.5.6, when > transitioning the Link from L0s to L0, it must transmit N_FTS Fast > Training Sequences to enable the receiver to obtain bit and Symbol > lock. > > Components may have device-specific ways to configure N_FTS values > to advertise during Link training. Define an n_fts array with an > entry for each supported data rate. > > Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> > --- > dtschema/schemas/pci/pci-bus-common.yaml | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/dtschema/schemas/pci/pci-bus-common.yaml b/dtschema/schemas/pci/pci-bus-common.yaml > index a9309af..968df43 100644 > --- a/dtschema/schemas/pci/pci-bus-common.yaml > +++ b/dtschema/schemas/pci/pci-bus-common.yaml > @@ -128,6 +128,15 @@ properties: > $ref: /schemas/types.yaml#/definitions/uint32 > enum: [ 1, 2, 4, 8, 16, 32 ] > > + n-fts: > + description: > + The number of Fast Training Sequences (N_FTS) required by the > + Receiver (this component) when transitioning the Link from L0s > + to L0; advertised during initial Link training > + $ref: /schemas/types.yaml#/definitions/uint8-array > + minItems: 1 > + maxItems: 5 You still need to define what each entry is. > + > reset-gpios: > description: GPIO controlled connection to PERST# signal > maxItems: 1 > -- > 2.34.1 >
diff --git a/dtschema/schemas/pci/pci-bus-common.yaml b/dtschema/schemas/pci/pci-bus-common.yaml index a9309af..968df43 100644 --- a/dtschema/schemas/pci/pci-bus-common.yaml +++ b/dtschema/schemas/pci/pci-bus-common.yaml @@ -128,6 +128,15 @@ properties: $ref: /schemas/types.yaml#/definitions/uint32 enum: [ 1, 2, 4, 8, 16, 32 ] + n-fts: + description: + The number of Fast Training Sequences (N_FTS) required by the + Receiver (this component) when transitioning the Link from L0s + to L0; advertised during initial Link training + $ref: /schemas/types.yaml#/definitions/uint8-array + minItems: 1 + maxItems: 5 + reset-gpios: description: GPIO controlled connection to PERST# signal maxItems: 1
Per PCIe r6.0, sec 4.2.5.1, during Link training, a PCIe component captures the N_FTS value it receives. Per 4.2.5.6, when transitioning the Link from L0s to L0, it must transmit N_FTS Fast Training Sequences to enable the receiver to obtain bit and Symbol lock. Components may have device-specific ways to configure N_FTS values to advertise during Link training. Define an n_fts array with an entry for each supported data rate. Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> --- dtschema/schemas/pci/pci-bus-common.yaml | 9 +++++++++ 1 file changed, 9 insertions(+)