| Message ID | 20250129212328.1627891-2-alexeymin@postmarketos.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | [v2,1/3] dt-bindings: clock: gcc-sdm660: Add missing SDCC resets | expand |
On 29.01.2025 10:23 PM, Alexey Minnekhanov wrote: > This will allow linux to properly reset eMMC/SD blocks. > > Signed-off-by: Alexey Minnekhanov <alexeymin@postmarketos.org> > Fixes: f2a76a2955c0 ("clk: qcom: Add Global Clock controller (GCC) driver for SDM660") > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Konrad
diff --git a/drivers/clk/qcom/gcc-sdm660.c b/drivers/clk/qcom/gcc-sdm660.c index df79298a1a25..01a76f1b5b4c 100644 --- a/drivers/clk/qcom/gcc-sdm660.c +++ b/drivers/clk/qcom/gcc-sdm660.c @@ -2420,6 +2420,8 @@ static struct gdsc *gcc_sdm660_gdscs[] = { static const struct qcom_reset_map gcc_sdm660_resets[] = { [GCC_QUSB2PHY_PRIM_BCR] = { 0x12000 }, [GCC_QUSB2PHY_SEC_BCR] = { 0x12004 }, + [GCC_SDCC2_BCR] = { 0x14000 }, + [GCC_SDCC1_BCR] = { 0x16000 }, [GCC_UFS_BCR] = { 0x75000 }, [GCC_USB3_DP_PHY_BCR] = { 0x50028 }, [GCC_USB3_PHY_BCR] = { 0x50020 },
This will allow linux to properly reset eMMC/SD blocks. Signed-off-by: Alexey Minnekhanov <alexeymin@postmarketos.org> Fixes: f2a76a2955c0 ("clk: qcom: Add Global Clock controller (GCC) driver for SDM660") --- drivers/clk/qcom/gcc-sdm660.c | 2 ++ 1 file changed, 2 insertions(+)