Message ID | a5fc316b-bcd6-4570-a997-0cd15273da9f@suse.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | AMD/IOMMU: assorted corrections | expand |
On Mon, Feb 03, 2025 at 05:24:10PM +0100, Jan Beulich wrote: > While the 2nd of the commits referenced below should have moved the call > to amd_iommu_msi_enable() instead of adding another one, the situation > wasn't quite right even before: It can't have done any good to enable > MSI when no IRQ was allocated for it, yet. > > The other call to amd_iommu_msi_enable(), just out of patch context, > needs to stay there until S3 resume is re-worked. For the boot path that > call should be unnecessary, as iommu{,_maskable}_msi_startup() will have > done it already (by way of invoking iommu_msi_unmask()). > > Fixes: 5f569f1ac50e ("AMD/IOMMU: allow enabling with IRQ not yet set up") > Fixes: d9e49d1afe2e ("AMD/IOMMU: adjust setup of internal interrupt for x2APIC mode") > Signed-off-by: Jan Beulich <jbeulich@suse.com> > Reviewed-by: Jason Andryuk <jason.andryuk@amd.com> > Tested-by: Jason Andryuk <jason.andryuk@amd.com> Acked-by: Roger Pau Monné <roger.pau@citrix.com> Thanks, Roger.
--- a/xen/drivers/passthrough/amd/iommu_init.c +++ b/xen/drivers/passthrough/amd/iommu_init.c @@ -902,8 +902,6 @@ static void enable_iommu(struct amd_iomm } } - amd_iommu_msi_enable(iommu, IOMMU_CONTROL_ENABLED); - set_iommu_ht_flags(iommu); set_iommu_command_buffer_control(iommu, IOMMU_CONTROL_ENABLED);