| Message ID | 20250204-exynos7870-usbphy-v1-1-f30a9857efeb@disroot.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Introduce USBDRD-PHY support for Exynos7870 SoC | expand |
On Tue, Feb 04, 2025 at 02:10:12AM +0530, Kaustabh Chakraborty wrote: > In exynos5_usbdrd_{pipe3,utmi}_set_refclk(), the masks > PHYCLKRST_MPLL_MULTIPLIER_MASK and PHYCLKRST_SSC_REFCLKSEL_MASK are not > inverted when applied to the register values. Fix it. > > Fixes: 59025887fb08 ("phy: Add new Exynos5 USB 3.0 PHY driver") Missing Cc-stable and this should be sent separately. > Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> > --- > drivers/phy/samsung/phy-exynos5-usbdrd.c | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/drivers/phy/samsung/phy-exynos5-usbdrd.c b/drivers/phy/samsung/phy-exynos5-usbdrd.c > index c421b495eb0fe4396d76f8c9d7c198ad7cd08869..4a108fdab118c0edd76bd88dc9dbf6a498e064b3 100644 > --- a/drivers/phy/samsung/phy-exynos5-usbdrd.c > +++ b/drivers/phy/samsung/phy-exynos5-usbdrd.c > @@ -488,9 +488,9 @@ exynos5_usbdrd_pipe3_set_refclk(struct phy_usb_instance *inst) > reg |= PHYCLKRST_REFCLKSEL_EXT_REFCLK; > > /* FSEL settings corresponding to reference clock */ > - reg &= ~PHYCLKRST_FSEL_PIPE_MASK | > - PHYCLKRST_MPLL_MULTIPLIER_MASK | > - PHYCLKRST_SSC_REFCLKSEL_MASK; > + reg &= ~(PHYCLKRST_FSEL_PIPE_MASK | > + PHYCLKRST_MPLL_MULTIPLIER_MASK | > + PHYCLKRST_SSC_REFCLKSEL_MASK); > switch (phy_drd->extrefclk) { > case EXYNOS5_FSEL_50MHZ: > reg |= (PHYCLKRST_MPLL_MULTIPLIER_50M_REF | > @@ -532,9 +532,9 @@ exynos5_usbdrd_utmi_set_refclk(struct phy_usb_instance *inst) > reg &= ~PHYCLKRST_REFCLKSEL_MASK; > reg |= PHYCLKRST_REFCLKSEL_EXT_REFCLK; > > - reg &= ~PHYCLKRST_FSEL_UTMI_MASK | > - PHYCLKRST_MPLL_MULTIPLIER_MASK | > - PHYCLKRST_SSC_REFCLKSEL_MASK; > + reg &= ~(PHYCLKRST_FSEL_UTMI_MASK | > + PHYCLKRST_MPLL_MULTIPLIER_MASK | > + PHYCLKRST_SSC_REFCLKSEL_MASK); > reg |= PHYCLKRST_FSEL(phy_drd->extrefclk); This part does not set MPLL_MULTIPLIER and SSC_REFCLKSEL fields later, but I also assume intention was to clear the fields. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/drivers/phy/samsung/phy-exynos5-usbdrd.c b/drivers/phy/samsung/phy-exynos5-usbdrd.c index c421b495eb0fe4396d76f8c9d7c198ad7cd08869..4a108fdab118c0edd76bd88dc9dbf6a498e064b3 100644 --- a/drivers/phy/samsung/phy-exynos5-usbdrd.c +++ b/drivers/phy/samsung/phy-exynos5-usbdrd.c @@ -488,9 +488,9 @@ exynos5_usbdrd_pipe3_set_refclk(struct phy_usb_instance *inst) reg |= PHYCLKRST_REFCLKSEL_EXT_REFCLK; /* FSEL settings corresponding to reference clock */ - reg &= ~PHYCLKRST_FSEL_PIPE_MASK | - PHYCLKRST_MPLL_MULTIPLIER_MASK | - PHYCLKRST_SSC_REFCLKSEL_MASK; + reg &= ~(PHYCLKRST_FSEL_PIPE_MASK | + PHYCLKRST_MPLL_MULTIPLIER_MASK | + PHYCLKRST_SSC_REFCLKSEL_MASK); switch (phy_drd->extrefclk) { case EXYNOS5_FSEL_50MHZ: reg |= (PHYCLKRST_MPLL_MULTIPLIER_50M_REF | @@ -532,9 +532,9 @@ exynos5_usbdrd_utmi_set_refclk(struct phy_usb_instance *inst) reg &= ~PHYCLKRST_REFCLKSEL_MASK; reg |= PHYCLKRST_REFCLKSEL_EXT_REFCLK; - reg &= ~PHYCLKRST_FSEL_UTMI_MASK | - PHYCLKRST_MPLL_MULTIPLIER_MASK | - PHYCLKRST_SSC_REFCLKSEL_MASK; + reg &= ~(PHYCLKRST_FSEL_UTMI_MASK | + PHYCLKRST_MPLL_MULTIPLIER_MASK | + PHYCLKRST_SSC_REFCLKSEL_MASK); reg |= PHYCLKRST_FSEL(phy_drd->extrefclk); return reg;
In exynos5_usbdrd_{pipe3,utmi}_set_refclk(), the masks PHYCLKRST_MPLL_MULTIPLIER_MASK and PHYCLKRST_SSC_REFCLKSEL_MASK are not inverted when applied to the register values. Fix it. Fixes: 59025887fb08 ("phy: Add new Exynos5 USB 3.0 PHY driver") Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> --- drivers/phy/samsung/phy-exynos5-usbdrd.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)