| Message ID | 20250204134228.2934744-1-jani.nikula@intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | [1/3] drm/i915/display: convert intel_ddi_buf_trans.c to struct intel_display | expand |
On Tue, Feb 04, 2025 at 03:42:26PM +0200, Jani Nikula wrote: > Going forward, struct intel_display is the main device data structure > for display. Switch to it. > > For MISSING_CASE(), log the PCI ID instead of the platform to get rid of > the i915_drv.h dependency. good idea! > > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > --- > .../drm/i915/display/intel_ddi_buf_trans.c | 58 +++++++++++-------- > 1 file changed, 33 insertions(+), 25 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c > index 9389b295036e..a238be5bc455 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c > @@ -3,13 +3,13 @@ > * Copyright © 2020 Intel Corporation > */ > > -#include "i915_drv.h" \o/ Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > +#include "i915_utils.h" > +#include "intel_cx0_phy.h" > #include "intel_ddi.h" > #include "intel_ddi_buf_trans.h" > #include "intel_de.h" > #include "intel_display_types.h" > #include "intel_dp.h" > -#include "intel_cx0_phy.h" > > /* HDMI/DVI modes ignore everything but the last 2 items. So we share > * them for both DP and FDI transports, allowing those ports to > @@ -1407,10 +1407,10 @@ tgl_get_combo_buf_trans_dp(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > { > - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > + struct intel_display *display = to_intel_display(encoder); > > if (crtc_state->port_clock > 270000) { > - if (IS_TIGERLAKE_UY(dev_priv)) { > + if (display->platform.tigerlake_uy) { > return intel_get_buf_trans(&tgl_uy_combo_phy_trans_dp_hbr2, > n_entries); > } else { > @@ -1709,59 +1709,67 @@ mtl_get_c20_buf_trans(struct intel_encoder *encoder, > > void intel_ddi_buf_trans_init(struct intel_encoder *encoder) > { > - struct drm_i915_private *i915 = to_i915(encoder->base.dev); > + struct intel_display *display = to_intel_display(encoder); > > - if (DISPLAY_VER(i915) >= 14) { > + if (DISPLAY_VER(display) >= 14) { > if (intel_encoder_is_c10phy(encoder)) > encoder->get_buf_trans = mtl_get_c10_buf_trans; > else > encoder->get_buf_trans = mtl_get_c20_buf_trans; > - } else if (IS_DG2(i915)) { > + } else if (display->platform.dg2) { > encoder->get_buf_trans = dg2_get_snps_buf_trans; > - } else if (IS_ALDERLAKE_P(i915)) { > + } else if (display->platform.alderlake_p) { > if (intel_encoder_is_combo(encoder)) > encoder->get_buf_trans = adlp_get_combo_buf_trans; > else > encoder->get_buf_trans = adlp_get_dkl_buf_trans; > - } else if (IS_ALDERLAKE_S(i915)) { > + } else if (display->platform.alderlake_s) { > encoder->get_buf_trans = adls_get_combo_buf_trans; > - } else if (IS_ROCKETLAKE(i915)) { > + } else if (display->platform.rocketlake) { > encoder->get_buf_trans = rkl_get_combo_buf_trans; > - } else if (IS_DG1(i915)) { > + } else if (display->platform.dg1) { > encoder->get_buf_trans = dg1_get_combo_buf_trans; > - } else if (DISPLAY_VER(i915) >= 12) { > + } else if (DISPLAY_VER(display) >= 12) { > if (intel_encoder_is_combo(encoder)) > encoder->get_buf_trans = tgl_get_combo_buf_trans; > else > encoder->get_buf_trans = tgl_get_dkl_buf_trans; > - } else if (DISPLAY_VER(i915) == 11) { > - if (IS_JASPERLAKE(i915)) > + } else if (DISPLAY_VER(display) == 11) { > + if (display->platform.jasperlake) > encoder->get_buf_trans = jsl_get_combo_buf_trans; > - else if (IS_ELKHARTLAKE(i915)) > + else if (display->platform.elkhartlake) > encoder->get_buf_trans = ehl_get_combo_buf_trans; > else if (intel_encoder_is_combo(encoder)) > encoder->get_buf_trans = icl_get_combo_buf_trans; > else > encoder->get_buf_trans = icl_get_mg_buf_trans; > - } else if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) { > + } else if (display->platform.geminilake || display->platform.broxton) { > encoder->get_buf_trans = bxt_get_buf_trans; > - } else if (IS_COMETLAKE_ULX(i915) || IS_COFFEELAKE_ULX(i915) || IS_KABYLAKE_ULX(i915)) { > + } else if (display->platform.cometlake_ulx || > + display->platform.coffeelake_ulx || > + display->platform.kabylake_ulx) { > encoder->get_buf_trans = kbl_y_get_buf_trans; > - } else if (IS_COMETLAKE_ULT(i915) || IS_COFFEELAKE_ULT(i915) || IS_KABYLAKE_ULT(i915)) { > + } else if (display->platform.cometlake_ult || > + display->platform.coffeelake_ult || > + display->platform.kabylake_ult) { > encoder->get_buf_trans = kbl_u_get_buf_trans; > - } else if (IS_COMETLAKE(i915) || IS_COFFEELAKE(i915) || IS_KABYLAKE(i915)) { > + } else if (display->platform.cometlake || > + display->platform.coffeelake || > + display->platform.kabylake) { > encoder->get_buf_trans = kbl_get_buf_trans; > - } else if (IS_SKYLAKE_ULX(i915)) { > + } else if (display->platform.skylake_ulx) { > encoder->get_buf_trans = skl_y_get_buf_trans; > - } else if (IS_SKYLAKE_ULT(i915)) { > + } else if (display->platform.skylake_ult) { > encoder->get_buf_trans = skl_u_get_buf_trans; > - } else if (IS_SKYLAKE(i915)) { > + } else if (display->platform.skylake) { > encoder->get_buf_trans = skl_get_buf_trans; > - } else if (IS_BROADWELL(i915)) { > + } else if (display->platform.broadwell) { > encoder->get_buf_trans = bdw_get_buf_trans; > - } else if (IS_HASWELL(i915)) { > + } else if (display->platform.haswell) { > encoder->get_buf_trans = hsw_get_buf_trans; > } else { > - MISSING_CASE(INTEL_INFO(i915)->platform); > + struct pci_dev *pdev = to_pci_dev(display->drm->dev); > + > + MISSING_CASE(pdev->device); > } > } > -- > 2.39.5 >
On Tue, 04 Feb 2025, Patchwork <patchwork@emeril.freedesktop.org> wrote: > == Series Details == > > Series: series starting with [1/3] drm/i915/display: convert intel_ddi_buf_trans.c to struct intel_display > URL : https://patchwork.freedesktop.org/series/144315/ > State : failure > > == Summary == > > CI Bug Log - changes from CI_DRM_16063 -> Patchwork_144315v1 > ==================================================== > > Summary > ------- > > **FAILURE** > > Serious unknown changes coming with Patchwork_144315v1 absolutely need to be > verified manually. > > If you think the reported changes have nothing to do with the changes > introduced in Patchwork_144315v1, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them > to document this new failure mode, which will reduce false positives in CI. > > External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144315v1/index.html > > Participating hosts (43 -> 42) > ------------------------------ > > Missing (1): fi-snb-2520m > > Possible new issues > ------------------- > > Here are the unknown changes that may have been introduced in Patchwork_144315v1: > > ### IGT changes ### > > #### Possible regressions #### > > * igt@i915_pm_rpm@module-reload: > - bat-rpls-4: [PASS][1] -> [FAIL][2] > [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16063/bat-rpls-4/igt@i915_pm_rpm@module-reload.html > [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144315v1/bat-rpls-4/igt@i915_pm_rpm@module-reload.html Please re-report. What's with the module reload now? BR, Jani. > > > Known issues > ------------ > > Here are the changes found in Patchwork_144315v1 that come from known issues: > > ### IGT changes ### > > #### Issues hit #### > > * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence: > - bat-dg2-11: [PASS][3] -> [SKIP][4] ([i915#9197]) +3 other tests skip > [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16063/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html > [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144315v1/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html > > > #### Possible fixes #### > > * igt@dmabuf@all-tests: > - bat-apl-1: [INCOMPLETE][5] ([i915#12904]) -> [PASS][6] +1 other test pass > [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16063/bat-apl-1/igt@dmabuf@all-tests.html > [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144315v1/bat-apl-1/igt@dmabuf@all-tests.html > > * igt@i915_selftest@live@workarounds: > - {bat-mtlp-9}: [DMESG-FAIL][7] ([i915#12061]) -> [PASS][8] +1 other test pass > [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16063/bat-mtlp-9/igt@i915_selftest@live@workarounds.html > [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144315v1/bat-mtlp-9/igt@i915_selftest@live@workarounds.html > > > {name}: This element is suppressed. This means it is ignored when computing > the status of the difference (SUCCESS, WARNING, or FAILURE). > > [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061 > [i915#12904]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12904 > [i915#9197]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9197 > > > Build changes > ------------- > > * Linux: CI_DRM_16063 -> Patchwork_144315v1 > > CI-20190529: 20190529 > CI_DRM_16063: 34f113e9fef546134e402e7657fc47e92fba59dc @ git://anongit.freedesktop.org/gfx-ci/linux > IGT_8223: ccfe042787b082c06402ff9af257f8338b8edd5e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git > Patchwork_144315v1: 34f113e9fef546134e402e7657fc47e92fba59dc @ git://anongit.freedesktop.org/gfx-ci/linux > > == Logs == > > For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144315v1/index.html
Hi, https://patchwork.freedesktop.org/series/144315/ - Re-reported. i915.CI.BAT - Re-reported. Thanks, Ravali. -----Original Message----- From: I915-ci-infra <i915-ci-infra-bounces@lists.freedesktop.org> On Behalf Of Jani Nikula Sent: 05 February 2025 14:01 To: I915-ci-infra@lists.freedesktop.org Cc: intel-gfx@lists.freedesktop.org Subject: Re: ✗ i915.CI.BAT: failure for series starting with [1/3] drm/i915/display: convert intel_ddi_buf_trans.c to struct intel_display On Tue, 04 Feb 2025, Patchwork <patchwork@emeril.freedesktop.org> wrote: > == Series Details == > > Series: series starting with [1/3] drm/i915/display: convert intel_ddi_buf_trans.c to struct intel_display > URL : https://patchwork.freedesktop.org/series/144315/ > State : failure > > == Summary == > > CI Bug Log - changes from CI_DRM_16063 -> Patchwork_144315v1 > ==================================================== > > Summary > ------- > > **FAILURE** > > Serious unknown changes coming with Patchwork_144315v1 absolutely need to be > verified manually. > > If you think the reported changes have nothing to do with the changes > introduced in Patchwork_144315v1, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them > to document this new failure mode, which will reduce false positives in CI. > > External URL: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144315v1/index.html > > Participating hosts (43 -> 42) > ------------------------------ > > Missing (1): fi-snb-2520m > > Possible new issues > ------------------- > > Here are the unknown changes that may have been introduced in Patchwork_144315v1: > > ### IGT changes ### > > #### Possible regressions #### > > * igt@i915_pm_rpm@module-reload: > - bat-rpls-4: [PASS][1] -> [FAIL][2] > [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16063/bat-rpls-4/igt@i915_pm_rpm@module-reload.html > [2]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144315v1/bat-rpls-4 > /igt@i915_pm_rpm@module-reload.html Please re-report. What's with the module reload now? BR, Jani. > > > Known issues > ------------ > > Here are the changes found in Patchwork_144315v1 that come from known issues: > > ### IGT changes ### > > #### Issues hit #### > > * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence: > - bat-dg2-11: [PASS][3] -> [SKIP][4] ([i915#9197]) +3 other tests skip > [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16063/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html > [4]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144315v1/bat-dg2-11 > /igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html > > > #### Possible fixes #### > > * igt@dmabuf@all-tests: > - bat-apl-1: [INCOMPLETE][5] ([i915#12904]) -> [PASS][6] +1 other test pass > [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16063/bat-apl-1/igt@dmabuf@all-tests.html > [6]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144315v1/bat-apl-1/ > igt@dmabuf@all-tests.html > > * igt@i915_selftest@live@workarounds: > - {bat-mtlp-9}: [DMESG-FAIL][7] ([i915#12061]) -> [PASS][8] +1 other test pass > [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16063/bat-mtlp-9/igt@i915_selftest@live@workarounds.html > [8]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144315v1/bat-mtlp-9 > /igt@i915_selftest@live@workarounds.html > > > {name}: This element is suppressed. This means it is ignored when computing > the status of the difference (SUCCESS, WARNING, or FAILURE). > > [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061 > [i915#12904]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12904 > [i915#9197]: > https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9197 > > > Build changes > ------------- > > * Linux: CI_DRM_16063 -> Patchwork_144315v1 > > CI-20190529: 20190529 > CI_DRM_16063: 34f113e9fef546134e402e7657fc47e92fba59dc @ git://anongit.freedesktop.org/gfx-ci/linux > IGT_8223: ccfe042787b082c06402ff9af257f8338b8edd5e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git > Patchwork_144315v1: 34f113e9fef546134e402e7657fc47e92fba59dc @ > git://anongit.freedesktop.org/gfx-ci/linux > > == Logs == > > For more details see: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_144315v1/index.html -- Jani Nikula, Intel
On Tue, 04 Feb 2025, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote: > On Tue, Feb 04, 2025 at 03:42:26PM +0200, Jani Nikula wrote: >> Going forward, struct intel_display is the main device data structure >> for display. Switch to it. >> >> For MISSING_CASE(), log the PCI ID instead of the platform to get rid of >> the i915_drv.h dependency. > > good idea! > >> >> Signed-off-by: Jani Nikula <jani.nikula@intel.com> >> --- >> .../drm/i915/display/intel_ddi_buf_trans.c | 58 +++++++++++-------- >> 1 file changed, 33 insertions(+), 25 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c >> index 9389b295036e..a238be5bc455 100644 >> --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c >> +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c >> @@ -3,13 +3,13 @@ >> * Copyright © 2020 Intel Corporation >> */ >> >> -#include "i915_drv.h" > > \o/ Indeed! > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Thanks, series pushed to din. > >> +#include "i915_utils.h" >> +#include "intel_cx0_phy.h" >> #include "intel_ddi.h" >> #include "intel_ddi_buf_trans.h" >> #include "intel_de.h" >> #include "intel_display_types.h" >> #include "intel_dp.h" >> -#include "intel_cx0_phy.h" >> >> /* HDMI/DVI modes ignore everything but the last 2 items. So we share >> * them for both DP and FDI transports, allowing those ports to >> @@ -1407,10 +1407,10 @@ tgl_get_combo_buf_trans_dp(struct intel_encoder *encoder, >> const struct intel_crtc_state *crtc_state, >> int *n_entries) >> { >> - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); >> + struct intel_display *display = to_intel_display(encoder); >> >> if (crtc_state->port_clock > 270000) { >> - if (IS_TIGERLAKE_UY(dev_priv)) { >> + if (display->platform.tigerlake_uy) { >> return intel_get_buf_trans(&tgl_uy_combo_phy_trans_dp_hbr2, >> n_entries); >> } else { >> @@ -1709,59 +1709,67 @@ mtl_get_c20_buf_trans(struct intel_encoder *encoder, >> >> void intel_ddi_buf_trans_init(struct intel_encoder *encoder) >> { >> - struct drm_i915_private *i915 = to_i915(encoder->base.dev); >> + struct intel_display *display = to_intel_display(encoder); >> >> - if (DISPLAY_VER(i915) >= 14) { >> + if (DISPLAY_VER(display) >= 14) { >> if (intel_encoder_is_c10phy(encoder)) >> encoder->get_buf_trans = mtl_get_c10_buf_trans; >> else >> encoder->get_buf_trans = mtl_get_c20_buf_trans; >> - } else if (IS_DG2(i915)) { >> + } else if (display->platform.dg2) { >> encoder->get_buf_trans = dg2_get_snps_buf_trans; >> - } else if (IS_ALDERLAKE_P(i915)) { >> + } else if (display->platform.alderlake_p) { >> if (intel_encoder_is_combo(encoder)) >> encoder->get_buf_trans = adlp_get_combo_buf_trans; >> else >> encoder->get_buf_trans = adlp_get_dkl_buf_trans; >> - } else if (IS_ALDERLAKE_S(i915)) { >> + } else if (display->platform.alderlake_s) { >> encoder->get_buf_trans = adls_get_combo_buf_trans; >> - } else if (IS_ROCKETLAKE(i915)) { >> + } else if (display->platform.rocketlake) { >> encoder->get_buf_trans = rkl_get_combo_buf_trans; >> - } else if (IS_DG1(i915)) { >> + } else if (display->platform.dg1) { >> encoder->get_buf_trans = dg1_get_combo_buf_trans; >> - } else if (DISPLAY_VER(i915) >= 12) { >> + } else if (DISPLAY_VER(display) >= 12) { >> if (intel_encoder_is_combo(encoder)) >> encoder->get_buf_trans = tgl_get_combo_buf_trans; >> else >> encoder->get_buf_trans = tgl_get_dkl_buf_trans; >> - } else if (DISPLAY_VER(i915) == 11) { >> - if (IS_JASPERLAKE(i915)) >> + } else if (DISPLAY_VER(display) == 11) { >> + if (display->platform.jasperlake) >> encoder->get_buf_trans = jsl_get_combo_buf_trans; >> - else if (IS_ELKHARTLAKE(i915)) >> + else if (display->platform.elkhartlake) >> encoder->get_buf_trans = ehl_get_combo_buf_trans; >> else if (intel_encoder_is_combo(encoder)) >> encoder->get_buf_trans = icl_get_combo_buf_trans; >> else >> encoder->get_buf_trans = icl_get_mg_buf_trans; >> - } else if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) { >> + } else if (display->platform.geminilake || display->platform.broxton) { >> encoder->get_buf_trans = bxt_get_buf_trans; >> - } else if (IS_COMETLAKE_ULX(i915) || IS_COFFEELAKE_ULX(i915) || IS_KABYLAKE_ULX(i915)) { >> + } else if (display->platform.cometlake_ulx || >> + display->platform.coffeelake_ulx || >> + display->platform.kabylake_ulx) { >> encoder->get_buf_trans = kbl_y_get_buf_trans; >> - } else if (IS_COMETLAKE_ULT(i915) || IS_COFFEELAKE_ULT(i915) || IS_KABYLAKE_ULT(i915)) { >> + } else if (display->platform.cometlake_ult || >> + display->platform.coffeelake_ult || >> + display->platform.kabylake_ult) { >> encoder->get_buf_trans = kbl_u_get_buf_trans; >> - } else if (IS_COMETLAKE(i915) || IS_COFFEELAKE(i915) || IS_KABYLAKE(i915)) { >> + } else if (display->platform.cometlake || >> + display->platform.coffeelake || >> + display->platform.kabylake) { >> encoder->get_buf_trans = kbl_get_buf_trans; >> - } else if (IS_SKYLAKE_ULX(i915)) { >> + } else if (display->platform.skylake_ulx) { >> encoder->get_buf_trans = skl_y_get_buf_trans; >> - } else if (IS_SKYLAKE_ULT(i915)) { >> + } else if (display->platform.skylake_ult) { >> encoder->get_buf_trans = skl_u_get_buf_trans; >> - } else if (IS_SKYLAKE(i915)) { >> + } else if (display->platform.skylake) { >> encoder->get_buf_trans = skl_get_buf_trans; >> - } else if (IS_BROADWELL(i915)) { >> + } else if (display->platform.broadwell) { >> encoder->get_buf_trans = bdw_get_buf_trans; >> - } else if (IS_HASWELL(i915)) { >> + } else if (display->platform.haswell) { >> encoder->get_buf_trans = hsw_get_buf_trans; >> } else { >> - MISSING_CASE(INTEL_INFO(i915)->platform); >> + struct pci_dev *pdev = to_pci_dev(display->drm->dev); >> + >> + MISSING_CASE(pdev->device); >> } >> } >> -- >> 2.39.5 >>
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c index 9389b295036e..a238be5bc455 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c @@ -3,13 +3,13 @@ * Copyright © 2020 Intel Corporation */ -#include "i915_drv.h" +#include "i915_utils.h" +#include "intel_cx0_phy.h" #include "intel_ddi.h" #include "intel_ddi_buf_trans.h" #include "intel_de.h" #include "intel_display_types.h" #include "intel_dp.h" -#include "intel_cx0_phy.h" /* HDMI/DVI modes ignore everything but the last 2 items. So we share * them for both DP and FDI transports, allowing those ports to @@ -1407,10 +1407,10 @@ tgl_get_combo_buf_trans_dp(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) { - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); + struct intel_display *display = to_intel_display(encoder); if (crtc_state->port_clock > 270000) { - if (IS_TIGERLAKE_UY(dev_priv)) { + if (display->platform.tigerlake_uy) { return intel_get_buf_trans(&tgl_uy_combo_phy_trans_dp_hbr2, n_entries); } else { @@ -1709,59 +1709,67 @@ mtl_get_c20_buf_trans(struct intel_encoder *encoder, void intel_ddi_buf_trans_init(struct intel_encoder *encoder) { - struct drm_i915_private *i915 = to_i915(encoder->base.dev); + struct intel_display *display = to_intel_display(encoder); - if (DISPLAY_VER(i915) >= 14) { + if (DISPLAY_VER(display) >= 14) { if (intel_encoder_is_c10phy(encoder)) encoder->get_buf_trans = mtl_get_c10_buf_trans; else encoder->get_buf_trans = mtl_get_c20_buf_trans; - } else if (IS_DG2(i915)) { + } else if (display->platform.dg2) { encoder->get_buf_trans = dg2_get_snps_buf_trans; - } else if (IS_ALDERLAKE_P(i915)) { + } else if (display->platform.alderlake_p) { if (intel_encoder_is_combo(encoder)) encoder->get_buf_trans = adlp_get_combo_buf_trans; else encoder->get_buf_trans = adlp_get_dkl_buf_trans; - } else if (IS_ALDERLAKE_S(i915)) { + } else if (display->platform.alderlake_s) { encoder->get_buf_trans = adls_get_combo_buf_trans; - } else if (IS_ROCKETLAKE(i915)) { + } else if (display->platform.rocketlake) { encoder->get_buf_trans = rkl_get_combo_buf_trans; - } else if (IS_DG1(i915)) { + } else if (display->platform.dg1) { encoder->get_buf_trans = dg1_get_combo_buf_trans; - } else if (DISPLAY_VER(i915) >= 12) { + } else if (DISPLAY_VER(display) >= 12) { if (intel_encoder_is_combo(encoder)) encoder->get_buf_trans = tgl_get_combo_buf_trans; else encoder->get_buf_trans = tgl_get_dkl_buf_trans; - } else if (DISPLAY_VER(i915) == 11) { - if (IS_JASPERLAKE(i915)) + } else if (DISPLAY_VER(display) == 11) { + if (display->platform.jasperlake) encoder->get_buf_trans = jsl_get_combo_buf_trans; - else if (IS_ELKHARTLAKE(i915)) + else if (display->platform.elkhartlake) encoder->get_buf_trans = ehl_get_combo_buf_trans; else if (intel_encoder_is_combo(encoder)) encoder->get_buf_trans = icl_get_combo_buf_trans; else encoder->get_buf_trans = icl_get_mg_buf_trans; - } else if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) { + } else if (display->platform.geminilake || display->platform.broxton) { encoder->get_buf_trans = bxt_get_buf_trans; - } else if (IS_COMETLAKE_ULX(i915) || IS_COFFEELAKE_ULX(i915) || IS_KABYLAKE_ULX(i915)) { + } else if (display->platform.cometlake_ulx || + display->platform.coffeelake_ulx || + display->platform.kabylake_ulx) { encoder->get_buf_trans = kbl_y_get_buf_trans; - } else if (IS_COMETLAKE_ULT(i915) || IS_COFFEELAKE_ULT(i915) || IS_KABYLAKE_ULT(i915)) { + } else if (display->platform.cometlake_ult || + display->platform.coffeelake_ult || + display->platform.kabylake_ult) { encoder->get_buf_trans = kbl_u_get_buf_trans; - } else if (IS_COMETLAKE(i915) || IS_COFFEELAKE(i915) || IS_KABYLAKE(i915)) { + } else if (display->platform.cometlake || + display->platform.coffeelake || + display->platform.kabylake) { encoder->get_buf_trans = kbl_get_buf_trans; - } else if (IS_SKYLAKE_ULX(i915)) { + } else if (display->platform.skylake_ulx) { encoder->get_buf_trans = skl_y_get_buf_trans; - } else if (IS_SKYLAKE_ULT(i915)) { + } else if (display->platform.skylake_ult) { encoder->get_buf_trans = skl_u_get_buf_trans; - } else if (IS_SKYLAKE(i915)) { + } else if (display->platform.skylake) { encoder->get_buf_trans = skl_get_buf_trans; - } else if (IS_BROADWELL(i915)) { + } else if (display->platform.broadwell) { encoder->get_buf_trans = bdw_get_buf_trans; - } else if (IS_HASWELL(i915)) { + } else if (display->platform.haswell) { encoder->get_buf_trans = hsw_get_buf_trans; } else { - MISSING_CASE(INTEL_INFO(i915)->platform); + struct pci_dev *pdev = to_pci_dev(display->drm->dev); + + MISSING_CASE(pdev->device); } }
Going forward, struct intel_display is the main device data structure for display. Switch to it. For MISSING_CASE(), log the PCI ID instead of the platform to get rid of the i915_drv.h dependency. Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- .../drm/i915/display/intel_ddi_buf_trans.c | 58 +++++++++++-------- 1 file changed, 33 insertions(+), 25 deletions(-)