diff mbox series

[v3,19/28] hw/misc/aspeed_hace: Fix coding style

Message ID 20250213033531.3367697-20-jamin_lin@aspeedtech.com (mailing list archive)
State New
Headers show
Series Support AST2700 A1 | expand

Commit Message

Jamin Lin Feb. 13, 2025, 3:35 a.m. UTC
Fix coding style issues from checkpatch.pl.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
 hw/misc/aspeed_hace.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

Comments

Cédric Le Goater Feb. 18, 2025, 6:21 a.m. UTC | #1
On 2/13/25 04:35, Jamin Lin wrote:
> Fix coding style issues from checkpatch.pl.
> 
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>


Reviewed-by: Cédric Le Goater <clg@redhat.com>

Thanks,

C.


> ---
>   hw/misc/aspeed_hace.c | 12 ++++++++----
>   1 file changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/hw/misc/aspeed_hace.c b/hw/misc/aspeed_hace.c
> index e3f7df2e86..18b85081c7 100644
> --- a/hw/misc/aspeed_hace.c
> +++ b/hw/misc/aspeed_hace.c
> @@ -75,9 +75,12 @@ static const struct {
>       { HASH_ALGO_SHA1, QCRYPTO_HASH_ALGO_SHA1 },
>       { HASH_ALGO_SHA224, QCRYPTO_HASH_ALGO_SHA224 },
>       { HASH_ALGO_SHA256, QCRYPTO_HASH_ALGO_SHA256 },
> -    { HASH_ALGO_SHA512_SERIES | HASH_ALGO_SHA512_SHA512, QCRYPTO_HASH_ALGO_SHA512 },
> -    { HASH_ALGO_SHA512_SERIES | HASH_ALGO_SHA512_SHA384, QCRYPTO_HASH_ALGO_SHA384 },
> -    { HASH_ALGO_SHA512_SERIES | HASH_ALGO_SHA512_SHA256, QCRYPTO_HASH_ALGO_SHA256 },
> +    { HASH_ALGO_SHA512_SERIES | HASH_ALGO_SHA512_SHA512,
> +      QCRYPTO_HASH_ALGO_SHA512 },
> +    { HASH_ALGO_SHA512_SERIES | HASH_ALGO_SHA512_SHA384,
> +      QCRYPTO_HASH_ALGO_SHA384 },
> +    { HASH_ALGO_SHA512_SERIES | HASH_ALGO_SHA512_SHA256,
> +      QCRYPTO_HASH_ALGO_SHA256 },
>   };
>   
>   static int hash_algo_lookup(uint32_t reg)
> @@ -201,7 +204,8 @@ static void do_hash_operation(AspeedHACEState *s, int algo, bool sg_mode,
>               haddr = address_space_map(&s->dram_as, addr, &plen, false,
>                                         MEMTXATTRS_UNSPECIFIED);
>               if (haddr == NULL) {
> -                qemu_log_mask(LOG_GUEST_ERROR, "%s: qcrypto failed\n", __func__);
> +                qemu_log_mask(LOG_GUEST_ERROR,
> +                              "%s: qcrypto failed\n", __func__);
>                   return;
>               }
>               iov[i].iov_base = haddr;
diff mbox series

Patch

diff --git a/hw/misc/aspeed_hace.c b/hw/misc/aspeed_hace.c
index e3f7df2e86..18b85081c7 100644
--- a/hw/misc/aspeed_hace.c
+++ b/hw/misc/aspeed_hace.c
@@ -75,9 +75,12 @@  static const struct {
     { HASH_ALGO_SHA1, QCRYPTO_HASH_ALGO_SHA1 },
     { HASH_ALGO_SHA224, QCRYPTO_HASH_ALGO_SHA224 },
     { HASH_ALGO_SHA256, QCRYPTO_HASH_ALGO_SHA256 },
-    { HASH_ALGO_SHA512_SERIES | HASH_ALGO_SHA512_SHA512, QCRYPTO_HASH_ALGO_SHA512 },
-    { HASH_ALGO_SHA512_SERIES | HASH_ALGO_SHA512_SHA384, QCRYPTO_HASH_ALGO_SHA384 },
-    { HASH_ALGO_SHA512_SERIES | HASH_ALGO_SHA512_SHA256, QCRYPTO_HASH_ALGO_SHA256 },
+    { HASH_ALGO_SHA512_SERIES | HASH_ALGO_SHA512_SHA512,
+      QCRYPTO_HASH_ALGO_SHA512 },
+    { HASH_ALGO_SHA512_SERIES | HASH_ALGO_SHA512_SHA384,
+      QCRYPTO_HASH_ALGO_SHA384 },
+    { HASH_ALGO_SHA512_SERIES | HASH_ALGO_SHA512_SHA256,
+      QCRYPTO_HASH_ALGO_SHA256 },
 };
 
 static int hash_algo_lookup(uint32_t reg)
@@ -201,7 +204,8 @@  static void do_hash_operation(AspeedHACEState *s, int algo, bool sg_mode,
             haddr = address_space_map(&s->dram_as, addr, &plen, false,
                                       MEMTXATTRS_UNSPECIFIED);
             if (haddr == NULL) {
-                qemu_log_mask(LOG_GUEST_ERROR, "%s: qcrypto failed\n", __func__);
+                qemu_log_mask(LOG_GUEST_ERROR,
+                              "%s: qcrypto failed\n", __func__);
                 return;
             }
             iov[i].iov_base = haddr;