diff mbox series

[next] drm/amd/display: Fix spelling mistake "oustanding" -> "outstanding"

Message ID 20250217095325.392152-1-colin.i.king@gmail.com (mailing list archive)
State New
Headers show
Series [next] drm/amd/display: Fix spelling mistake "oustanding" -> "outstanding" | expand

Commit Message

Colin King (gmail) Feb. 17, 2025, 9:53 a.m. UTC
There is a spelling mistake in max_oustanding_when_urgent_expected,
fix it.

Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
---
 .../dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c      | 6 +++---
 .../dc/dml2/dml21/src/dml2_core/dml2_core_shared_types.h    | 2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)

Comments

Alex Deucher Feb. 21, 2025, 8:56 p.m. UTC | #1
Applied.  Thanks!

Alex

On Mon, Feb 17, 2025 at 5:48 AM Colin Ian King <colin.i.king@gmail.com> wrote:
>
> There is a spelling mistake in max_oustanding_when_urgent_expected,
> fix it.
>
> Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
> ---
>  .../dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c      | 6 +++---
>  .../dc/dml2/dml21/src/dml2_core/dml2_core_shared_types.h    | 2 +-
>  2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
> index 87e53f59cb9f..243d02050e01 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
> @@ -5058,7 +5058,7 @@ static void CalculateExtraLatency(
>         double HostVMInefficiencyFactorPrefetch,
>         unsigned int HostVMMinPageSize,
>         enum dml2_qos_param_type qos_type,
> -       bool max_oustanding_when_urgent_expected,
> +       bool max_outstanding_when_urgent_expected,
>         unsigned int max_outstanding_requests,
>         unsigned int request_size_bytes_luma[],
>         unsigned int request_size_bytes_chroma[],
> @@ -5106,7 +5106,7 @@ static void CalculateExtraLatency(
>         if (qos_type == dml2_qos_param_type_dcn4x) {
>                 *ExtraLatency_sr = dchub_arb_to_ret_delay / DCFCLK;
>                 *ExtraLatency = *ExtraLatency_sr;
> -               if (max_oustanding_when_urgent_expected)
> +               if (max_outstanding_when_urgent_expected)
>                         *ExtraLatency = *ExtraLatency + (ROBBufferSizeInKByte * 1024 - max_outstanding_requests * max_request_size_bytes) / ReturnBW;
>         } else {
>                 *ExtraLatency_sr = dchub_arb_to_ret_delay / DCFCLK + RoundTripPingLatencyCycles / FabricClock + ReorderingBytes / ReturnBW;
> @@ -5121,7 +5121,7 @@ static void CalculateExtraLatency(
>         dml2_printf("DML::%s: qos_type=%u\n", __func__, qos_type);
>         dml2_printf("DML::%s: hostvm_mode=%u\n", __func__, hostvm_mode);
>         dml2_printf("DML::%s: Tex_trips=%u\n", __func__, Tex_trips);
> -       dml2_printf("DML::%s: max_oustanding_when_urgent_expected=%u\n", __func__, max_oustanding_when_urgent_expected);
> +       dml2_printf("DML::%s: max_outstanding_when_urgent_expected=%u\n", __func__, max_outstanding_when_urgent_expected);
>         dml2_printf("DML::%s: FabricClock=%f\n", __func__, FabricClock);
>         dml2_printf("DML::%s: DCFCLK=%f\n", __func__, DCFCLK);
>         dml2_printf("DML::%s: ReturnBW=%f\n", __func__, ReturnBW);
> diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared_types.h b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared_types.h
> index dfe54112a9c6..4e502f0a6d20 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared_types.h
> +++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared_types.h
> @@ -1571,7 +1571,7 @@ struct dml2_core_calcs_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport_param
>         unsigned int *DSTYAfterScaler;
>         bool UnboundedRequestEnabled;
>         unsigned int CompressedBufferSizeInkByte;
> -       bool max_oustanding_when_urgent_expected;
> +       bool max_outstanding_when_urgent_expected;
>         unsigned int max_outstanding_requests;
>         unsigned int max_request_size_bytes;
>         unsigned int *meta_row_height_l;
> --
> 2.47.2
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
index 87e53f59cb9f..243d02050e01 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
@@ -5058,7 +5058,7 @@  static void CalculateExtraLatency(
 	double HostVMInefficiencyFactorPrefetch,
 	unsigned int HostVMMinPageSize,
 	enum dml2_qos_param_type qos_type,
-	bool max_oustanding_when_urgent_expected,
+	bool max_outstanding_when_urgent_expected,
 	unsigned int max_outstanding_requests,
 	unsigned int request_size_bytes_luma[],
 	unsigned int request_size_bytes_chroma[],
@@ -5106,7 +5106,7 @@  static void CalculateExtraLatency(
 	if (qos_type == dml2_qos_param_type_dcn4x) {
 		*ExtraLatency_sr = dchub_arb_to_ret_delay / DCFCLK;
 		*ExtraLatency = *ExtraLatency_sr;
-		if (max_oustanding_when_urgent_expected)
+		if (max_outstanding_when_urgent_expected)
 			*ExtraLatency = *ExtraLatency + (ROBBufferSizeInKByte * 1024 - max_outstanding_requests * max_request_size_bytes) / ReturnBW;
 	} else {
 		*ExtraLatency_sr = dchub_arb_to_ret_delay / DCFCLK + RoundTripPingLatencyCycles / FabricClock + ReorderingBytes / ReturnBW;
@@ -5121,7 +5121,7 @@  static void CalculateExtraLatency(
 	dml2_printf("DML::%s: qos_type=%u\n", __func__, qos_type);
 	dml2_printf("DML::%s: hostvm_mode=%u\n", __func__, hostvm_mode);
 	dml2_printf("DML::%s: Tex_trips=%u\n", __func__, Tex_trips);
-	dml2_printf("DML::%s: max_oustanding_when_urgent_expected=%u\n", __func__, max_oustanding_when_urgent_expected);
+	dml2_printf("DML::%s: max_outstanding_when_urgent_expected=%u\n", __func__, max_outstanding_when_urgent_expected);
 	dml2_printf("DML::%s: FabricClock=%f\n", __func__, FabricClock);
 	dml2_printf("DML::%s: DCFCLK=%f\n", __func__, DCFCLK);
 	dml2_printf("DML::%s: ReturnBW=%f\n", __func__, ReturnBW);
diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared_types.h b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared_types.h
index dfe54112a9c6..4e502f0a6d20 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared_types.h
@@ -1571,7 +1571,7 @@  struct dml2_core_calcs_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport_param
 	unsigned int *DSTYAfterScaler;
 	bool UnboundedRequestEnabled;
 	unsigned int CompressedBufferSizeInkByte;
-	bool max_oustanding_when_urgent_expected;
+	bool max_outstanding_when_urgent_expected;
 	unsigned int max_outstanding_requests;
 	unsigned int max_request_size_bytes;
 	unsigned int *meta_row_height_l;