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[git,pull] drm fixes for 6.14-rc4

Message ID CAPM=9tyHJiMrF8nxXe=mhn0i5N1v-7RHh2TZfoz8BoUBBnuxzw@mail.gmail.com (mailing list archive)
State New
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Series [git,pull] drm fixes for 6.14-rc4 | expand

Pull-request

https://gitlab.freedesktop.org/drm/kernel.git tags/drm-fixes-2025-02-22

Message

Dave Airlie Feb. 21, 2025, 8:51 p.m. UTC
Hi Linus,

Weekly drm fixes pull request, lots of small things all over, msm has
a bunch of things but all very small, xe, i915, a fix for the cgroup
dmem controller.

Thanks,
Dave.

drm-fixes-2025-02-22:
drm fixes for v6.14-rc4

core:
- remove MAINTAINERS entry

cgroup/dmem:
- use correct function for pool descendants

panel:
- fix signal polarity issue jd9365da-h3

nouveau:
- folio handling fix
- config fix

amdxdna:
- fix missing header

xe:
- Fix error handling in xe_irq_install
- Fix devcoredump format

i915:
- Use spin_lock_irqsave() in interruptible context on guc submission
- Fixes on DDI and TRANS programming
- Make sure all planes in use by the joiner have their crtc included
- Fix 128b/132b modeset issues

msm:
- More catalog fixes:
- to skip watchdog programming through top block if its not present
- fix the setting of WB mask to ensure the WB input control is programmed
  correctly through ping-pong
- drop lm_pair for sm6150 as that chipset does not have any 3dmerge block
- Fix the mode validation logic for DP/eDP to account for widebus (2ppc)
  to allow high clock resolutions
- Fix to disable dither during encoder disable as otherwise this was
  causing kms_writeback failure due to resource sharing between
  WB and DSI paths as DSI uses dither but WB does not
- Fixes for virtual planes, namely to drop extraneous return and fix
  uninitialized variables
- Fix to avoid spill-over of DSC encoder block bits when programming
  the bits-per-component
- Fixes in the DSI PHY to protect against concurrent access of
  PHY_CMN_CLK_CFG regs between clock and display drivers
- Core/GPU:
- Fix non-blocking fence wait incorrectly rounding up to 1 jiffy timeout
- Only print GMU fw version once, instead of each time the GPU resumes
The following changes since commit 0ad2507d5d93f39619fc42372c347d6006b64319:

  Linux 6.14-rc3 (2025-02-16 14:02:44 -0800)

are available in the Git repository at:

  https://gitlab.freedesktop.org/drm/kernel.git tags/drm-fixes-2025-02-22

for you to fetch changes up to 9a1cd7d6df5d708ef244f93715855c8e54d79448:

  Merge tag 'drm-msm-fixes-2025-02-20' of
https://gitlab.freedesktop.org/drm/msm into drm-fixes (2025-02-21
10:50:29 +1000)

----------------------------------------------------------------
drm fixes for v6.14-rc4

core:
- remove MAINTAINERS entry

cgroup/dmem:
- use correct function for pool descendants

panel:
- fix signal polarity issue jd9365da-h3

nouveau:
- folio handling fix
- config fix

amdxdna:
- fix missing header

xe:
- Fix error handling in xe_irq_install
- Fix devcoredump format

i915:
- Use spin_lock_irqsave() in interruptible context on guc submission
- Fixes on DDI and TRANS programming
- Make sure all planes in use by the joiner have their crtc included
- Fix 128b/132b modeset issues

msm:
- More catalog fixes:
- to skip watchdog programming through top block if its not present
- fix the setting of WB mask to ensure the WB input control is programmed
  correctly through ping-pong
- drop lm_pair for sm6150 as that chipset does not have any 3dmerge block
- Fix the mode validation logic for DP/eDP to account for widebus (2ppc)
  to allow high clock resolutions
- Fix to disable dither during encoder disable as otherwise this was
  causing kms_writeback failure due to resource sharing between
  WB and DSI paths as DSI uses dither but WB does not
- Fixes for virtual planes, namely to drop extraneous return and fix
  uninitialized variables
- Fix to avoid spill-over of DSC encoder block bits when programming
  the bits-per-component
- Fixes in the DSI PHY to protect against concurrent access of
  PHY_CMN_CLK_CFG regs between clock and display drivers
- Core/GPU:
- Fix non-blocking fence wait incorrectly rounding up to 1 jiffy timeout
- Only print GMU fw version once, instead of each time the GPU resumes

----------------------------------------------------------------
Aaron Kling (1):
      drm/nouveau/pmu: Fix gp10b firmware guard

Abhinav Kumar (1):
      drm/msm/dp: account for widebus and yuv420 during mode validation

Dave Airlie (4):
      Merge tag 'drm-misc-fixes-2025-02-20' of
https://gitlab.freedesktop.org/drm/misc/kernel into drm-fixes
      Merge tag 'drm-xe-fixes-2025-02-20' of
https://gitlab.freedesktop.org/drm/xe/kernel into drm-fixes
      Merge tag 'drm-intel-fixes-2025-02-20' of
https://gitlab.freedesktop.org/drm/i915/kernel into drm-fixes
      Merge tag 'drm-msm-fixes-2025-02-20' of
https://gitlab.freedesktop.org/drm/msm into drm-fixes

David Hildenbrand (1):
      nouveau/svm: fix missing folio unlock + put after
make_device_exclusive_range()

Dmitry Baryshkov (3):
      drm/msm/dpu: skip watchdog timer programming through TOP on >= SM8450
      drm/msm/dpu: enable DPU_WB_INPUT_CTRL for DPU 5.x
      drm/msm/dpu: correct LM pairing for SM6150

Ethan Carter Edwards (1):
      drm/msm/dpu: Fix uninitialized variable

Friedrich Vock (1):
      cgroup/dmem: Don't open-code css_for_each_descendant_pre

Hugo Villeneuve (1):
      drm: panel: jd9365da-h3: fix reset signal polarity

Imre Deak (4):
      drm/i915/dsi: Use TRANS_DDI_FUNC_CTL's own port width macro
      drm/i915/ddi: Fix HDMI port width programming in DDI_BUF_CTL
      drm/i915/dp: Fix error handling during 128b/132b link training
      drm/i915/dp: Fix disabling the transcoder function in 128b/132b mode

Jessica Zhang (2):
      drm/msm/dpu: Disable dither in phys encoder cleanup
      drm/msm/dpu: Drop extraneous return in dpu_crtc_reassign_planes()

José Roberto de Souza (1):
      drm/xe: Make GUC binaries dump consistent with other binaries in
devcoredump

Karol Herbst (1):
      MAINTAINERS: Remove myself

Konrad Dybcio (1):
      drm/msm/a6xx: Only print the GMU firmware version once

Krzysztof Karas (1):
      drm/i915/gt: Use spin_lock_irqsave() in interruptible context

Krzysztof Kozlowski (3):
      drm/msm/dsi/phy: Protect PHY_CMN_CLK_CFG0 updated from driver side
      drm/msm/dsi/phy: Protect PHY_CMN_CLK_CFG1 against clock driver
      drm/msm/dsi/phy: Do not overwite PHY_CMN_CLK_CFG1 when choosing
bitclk source

Lucas De Marchi (2):
      drm/xe: Fix error handling in xe_irq_install()
      drm/xe/guc: Fix size_t print format

Marijn Suijten (1):
      drm/msm/dpu: Don't leak bits_per_component into random DSC_ENC fields

Rob Clark (1):
      drm/msm: Avoid rounding up to one jiffy

Su Hui (1):
      accel/amdxdna: Add missing include linux/slab.h

Ville Syrjälä (1):
      drm/i915: Make sure all planes in use by the joiner have their
crtc included

 MAINTAINERS                                        |  2 -
 drivers/accel/amdxdna/amdxdna_mailbox.c            |  1 +
 drivers/gpu/drm/i915/display/icl_dsi.c             |  4 +-
 drivers/gpu/drm/i915/display/intel_ddi.c           |  8 ++--
 drivers/gpu/drm/i915/display/intel_display.c       | 18 ++++++++
 .../gpu/drm/i915/display/intel_dp_link_training.c  | 15 +++++-
 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c  |  4 +-
 drivers/gpu/drm/i915/i915_reg.h                    |  2 +-
 drivers/gpu/drm/msm/adreno/a6xx_gmu.c              |  8 ++--
 .../gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h |  2 +-
 .../drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h    |  2 +-
 .../gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h |  2 -
 .../gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h |  2 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c           |  2 -
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c        |  3 ++
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c         |  3 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c         |  2 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c          |  7 ++-
 drivers/gpu/drm/msm/dp/dp_display.c                | 11 +++--
 drivers/gpu/drm/msm/dp/dp_drm.c                    |  5 +-
 drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c          | 53 +++++++++++++++-------
 drivers/gpu/drm/msm/msm_drv.h                      | 11 ++---
 .../gpu/drm/msm/registers/display/dsi_phy_7nm.xml  | 11 ++++-
 drivers/gpu/drm/nouveau/nouveau_svm.c              |  9 +++-
 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp10b.c    |  2 +-
 drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c   |  8 ++--
 drivers/gpu/drm/xe/xe_guc_ct.c                     |  6 ++-
 drivers/gpu/drm/xe/xe_guc_log.c                    |  3 +-
 drivers/gpu/drm/xe/xe_irq.c                        | 14 +-----
 kernel/cgroup/dmem.c                               | 50 +++++---------------
 30 files changed, 146 insertions(+), 124 deletions(-)

Comments

Linus Torvalds Feb. 21, 2025, 9:15 p.m. UTC | #1
Side note: I think you do something while editing or
cutting-and-pasting that loses indentation.

I sometimes have to guess at what the intended grouping is.

In this case, notice the "More catalog fixes" entry for the msm driver.

I *think* it refers to all the following bullet points up until the
"Core/GPU" grouping, but that is literally nothing but an edumacated
guess.

So when you write (or copy) the description, can I ask you to not drop
indentation like this?

            Linus

On Fri, 21 Feb 2025 at 12:51, Dave Airlie <airlied@gmail.com> wrote:
>
> msm:
> - More catalog fixes:
> - to skip watchdog programming through top block if its not present
> - fix the setting of WB mask to ensure the WB input control is programmed
>   correctly through ping-pong
> - drop lm_pair for sm6150 as that chipset does not have any 3dmerge block
> - Fix the mode validation logic for DP/eDP to account for widebus (2ppc)
>   to allow high clock resolutions
> - Fix to disable dither during encoder disable as otherwise this was
>   causing kms_writeback failure due to resource sharing between
>   WB and DSI paths as DSI uses dither but WB does not
> - Fixes for virtual planes, namely to drop extraneous return and fix
>   uninitialized variables
> - Fix to avoid spill-over of DSC encoder block bits when programming
>   the bits-per-component
> - Fixes in the DSI PHY to protect against concurrent access of
>   PHY_CMN_CLK_CFG regs between clock and display drivers
> - Core/GPU:
> - Fix non-blocking fence wait incorrectly rounding up to 1 jiffy timeout
> - Only print GMU fw version once, instead of each time the GPU resumes
pr-tracker-bot@kernel.org Feb. 21, 2025, 9:17 p.m. UTC | #2
The pull request you sent on Sat, 22 Feb 2025 06:51:33 +1000:

> https://gitlab.freedesktop.org/drm/kernel.git tags/drm-fixes-2025-02-22

has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/3ef7acec975bde28ab9cef92af76be8fc2ce684d

Thank you!
Dave Airlie Feb. 21, 2025, 9:24 p.m. UTC | #3
On Sat, 22 Feb 2025 at 07:15, Linus Torvalds
<torvalds@linux-foundation.org> wrote:
>
> Side note: I think you do something while editing or
> cutting-and-pasting that loses indentation.
>
> I sometimes have to guess at what the intended grouping is.
>
> In this case, notice the "More catalog fixes" entry for the msm driver.
>
> I *think* it refers to all the following bullet points up until the
> "Core/GPU" grouping, but that is literally nothing but an edumacated
> guess.
>
> So when you write (or copy) the description, can I ask you to not drop
> indentation like this?

I rewrite the MSM bits usually to align with others as they
subcategorise and nobody else does, but I can keep the indentation if
it doesn't look like noise on your end.

Dave.