drm/i915/xe3lpd: Map POWER_DOMAIN_AUDIO_PLAYBACK to DC_off

Commit Message

Gustavo Sousa Feb. 27, 2025, 7:14 p.m. UTC

In Xe3_LPD, display audio has the core audio logic located in PG0 and
per-transcoder logic in the same power well that provides power for the
transcoder [1].

For stuff like audio device enumeration, we need to ensure that PG0 is
turned on. For playback, we additionally need the transcoder's power
well to be enabled.

That essentially means that, for audio playback, there isn't a special
power well that needs to be enabled, because modeset sequences will
ensure that the required power wells are enabled.

That said, there might be cases where PG0 could be disabled due to
display entering DC6 while the audio driver tries to interact with the
graphics driver for stuff like audio device enumeration.

We recently hit that kind of scenario, where "aplay -l" was being used
to enumerate audio devices on a PTL machine with PSR enabled and no
external displays attached.

Since intel_audio_component_get_power() uses
POWER_DOMAIN_AUDIO_PLAYBACK, make sure to map that power domain to
DC_off power well, so that we disable dynamic DC states (which includes
DC6) while the audio driver needs display audio power.

[1] The core-audio vs per-transcoder logic split is not really new in
    Xe3_LPD. This is also true for previous display generations. We need
    to figure out the correct version where this split happened so that
    we can apply fixes in the current power domain mapping.

Bspec: 72519
Signed-off-by: Gustavo Sousa <[e-mail]>
---
 drivers/gpu/drm/i915/display/intel_display_power_map.c | 1 +
 1 file changed, 1 insertion(+)


---
base-commit: 4a2f1c823287a84dc0bd46c5a93545dfe49967f2
change-id: 20250226-xe3lpd-power-domain-audio-playback-8fb255190c3a

Best regards,

Comments

Kai Vehmanen Feb. 28, 2025, 9:40 a.m. UTC | #1

Hi,

On Thu, 27 Feb 2025, Gustavo Sousa wrote:

> In Xe3_LPD, display audio has the core audio logic located in PG0 and
> per-transcoder logic in the same power well that provides power for the
> transcoder [1].
[...]
> Since intel_audio_component_get_power() uses
> POWER_DOMAIN_AUDIO_PLAYBACK, make sure to map that power domain to
> DC_off power well, so that we disable dynamic DC states (which includes
> DC6) while the audio driver needs display audio power.
[...]
> +++ b/drivers/gpu/drm/i915/display/intel_display_power_map.c
> @@ -1694,6 +1694,7 @@ I915_DECL_PW_DOMAINS(xe3lpd_pwdoms_dc_off,
>  	XE3LPD_PW_C_POWER_DOMAINS,
>  	XE3LPD_PW_D_POWER_DOMAINS,
>  	POWER_DOMAIN_AUDIO_MMIO,
> +	POWER_DOMAIN_AUDIO_PLAYBACK,
>  	POWER_DOMAIN_INIT);

ack, this looks good and covers audio expectations for 
drm_audio_component.h usage:

Reviewed-by: Kai Vehmanen <[e-mail]>

Br, Kai

Gustavo Sousa March 10, 2025, 1:24 p.m. UTC | #2

Quoting Patchwork (2025-03-04 19:26:50-03:00)
>== Series Details ==
>
>Series: drm/i915/xe3lpd: Map POWER_DOMAIN_AUDIO_PLAYBACK to DC_off (rev2)
>URL   : https://patchwork.freedesktop.org/series/145593/
>State : failure
>
>== Summary ==
>
>CI Bug Log - changes from CI_DRM_16215_full -> Patchwork_145593v2_full
>====================================================
>
>Summary
>-------
>
>  **FAILURE**
>
>  Serious unknown changes coming with Patchwork_145593v2_full absolutely need to be
>  verified manually.
>  
>  If you think the reported changes have nothing to do with the changes
>  introduced in Patchwork_145593v2_full, please notify your bug team ([e-mail]) to allow them
>  to document this new failure mode, which will reduce false positives in CI.
>
>  
>
>Participating hosts (10 -> 10)
>------------------------------
>
>  No changes in participating hosts
>
>Possible new issues
>-------------------
>
>  Here are the unknown changes that may have been introduced in Patchwork_145593v2_full:
>
>### IGT changes ###
>
>#### Possible regressions ####

None of the issues below are related to the patch, since the power well
mapping being modified applies only to Xe3LPD.

>
>  * igt@kms_cdclk@plane-scaling@pipe-d-dp-4:
>    - shard-dg2:          NOTRUN -> [SKIP][1] +3 other tests skip
>   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145593v2/shard-dg2-10/igt@kms_cdclk@[e-mail]

Considering that this test had the status "NOTRUN" before, the SKIP here
makes sense, as the default mode in the connected panel might not be a
4k one.

>
>  * igt@kms_flip@plain-flip-ts-check@d-hdmi-a3:
>    - shard-dg2:          NOTRUN -> [FAIL][2]
>   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145593v2/shard-dg2-7/igt@kms_flip@[e-mail]

This maps to
https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13734 .

--
Gustavo Sousa

Gustavo Sousa March 10, 2025, 3:43 p.m. UTC | #3

Quoting Kai Vehmanen (2025-02-28 06:40:51-03:00)
>Hi,
>
>On Thu, 27 Feb 2025, Gustavo Sousa wrote:
>
>> In Xe3_LPD, display audio has the core audio logic located in PG0 and
>> per-transcoder logic in the same power well that provides power for the
>> transcoder [1].
>[...]
>> Since intel_audio_component_get_power() uses
>> POWER_DOMAIN_AUDIO_PLAYBACK, make sure to map that power domain to
>> DC_off power well, so that we disable dynamic DC states (which includes
>> DC6) while the audio driver needs display audio power.
>[...]
>> +++ b/drivers/gpu/drm/i915/display/intel_display_power_map.c
>> @@ -1694,6 +1694,7 @@ I915_DECL_PW_DOMAINS(xe3lpd_pwdoms_dc_off,
>>          XE3LPD_PW_C_POWER_DOMAINS,
>>          XE3LPD_PW_D_POWER_DOMAINS,
>>          POWER_DOMAIN_AUDIO_MMIO,
>> +        POWER_DOMAIN_AUDIO_PLAYBACK,
>>          POWER_DOMAIN_INIT);
>
>ack, this looks good and covers audio expectations for 
>drm_audio_component.h usage:
>
>Reviewed-by: Kai Vehmanen <[e-mail]>

Pushed to drm-intel-next. Thanks for the review!

--
Gustavo Sousa

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display_power_map.c b/drivers/gpu/drm/i915/display/intel_display_power_map.c
index 0c8ac1af6db7e005b9bf5b33d1c2e4cebbde2524..572383a817daa749f3579647855c2a858e010716 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_map.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_map.c
@@ -1694,6 +1694,7 @@  I915_DECL_PW_DOMAINS(xe3lpd_pwdoms_dc_off,
 	XE3LPD_PW_C_POWER_DOMAINS,
 	XE3LPD_PW_D_POWER_DOMAINS,
 	POWER_DOMAIN_AUDIO_MMIO,
+	POWER_DOMAIN_AUDIO_PLAYBACK,
 	POWER_DOMAIN_INIT);
 
 static const struct i915_power_well_desc xe3lpd_power_wells_dcoff[] = {