| Message ID | 20250228160810.171413-2-biju.das.jz@bp.renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | Add RZ/G3E xSPI support | expand |
On Fri, Feb 28, 2025 at 04:07:55PM +0000, Biju Das wrote: > Document support for the Expanded Serial Peripheral Interface (xSPI) > Controller in the Renesas RZ/G3E (R9A09G047) SoC. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > --- > .../memory-controllers/renesas,rz-xspi.yaml | 137 ++++++++++++++++++ > 1 file changed, 137 insertions(+) > create mode 100644 Documentation/devicetree/bindings/memory-controllers/renesas,rz-xspi.yaml > > diff --git a/Documentation/devicetree/bindings/memory-controllers/renesas,rz-xspi.yaml b/Documentation/devicetree/bindings/memory-controllers/renesas,rz-xspi.yaml > new file mode 100644 > index 000000000000..84875cd28460 > --- /dev/null > +++ b/Documentation/devicetree/bindings/memory-controllers/renesas,rz-xspi.yaml > @@ -0,0 +1,137 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/memory-controllers/renesas,rz-xspi.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Renesas Expanded Serial Peripheral Interface (xSPI) > + > +maintainers: > + - Biju Das <biju.das.jz@bp.renesas.com> > + > +description: | > + Renesas xSPI allows a SPI flash connected to the SoC to be accessed via > + the memory-mapping or the manual command mode. > + > + The flash chip itself should be represented by a subnode of the XSPI node. > + The flash interface is selected based on the "compatible" property of this > + subnode: > + - "jedec,spi-nor"; > + > +allOf: > + - $ref: /schemas/spi/spi-controller.yaml# > + > +properties: > + compatible: > + items: > + - const: renesas,r9a09g047-xspi # RZ/G3E > + - const: renesas,rz-xspi # a generic RZ xSPI device > + > + reg: > + items: > + - description: xSPI registers > + - description: direct mapping area > + > + reg-names: > + items: > + - const: regs > + - const: dirmap > + > + interrupts: > + items: > + - description: Interrupt pulse signal by factors excluding errors > + - description: Interrupt pulse signal by error factors > + > + interrupt-names: > + items: > + - const: spi_pulse > + - const: spi_err_pulse Drop 'spi' Otherwise, Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Hi Biju, On Fri, 28 Feb 2025 at 17:08, Biju Das <biju.das.jz@bp.renesas.com> wrote: > Document support for the Expanded Serial Peripheral Interface (xSPI) > Controller in the Renesas RZ/G3E (R9A09G047) SoC. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Thanks for your patch! > --- /dev/null > +++ b/Documentation/devicetree/bindings/memory-controllers/renesas,rz-xspi.yaml > +properties: > + compatible: > + items: > + - const: renesas,r9a09g047-xspi # RZ/G3E > + - const: renesas,rz-xspi # a generic RZ xSPI device Is this the same variant of RPC-IF as used on older "RZ" SoCs like RZ/A1 and RZ/A2? If the answer is yes, then I do not object against introducing rz-xspi. Gr{oetje,eeting}s, Geert
Hi Geert, > -----Original Message----- > From: Geert Uytterhoeven <geert@linux-m68k.org> > Sent: 06 March 2025 10:44 > Subject: Re: [PATCH 1/8] dt-bindings: memory: Document RZ/G3E support > > Hi Biju, > > On Fri, 28 Feb 2025 at 17:08, Biju Das <biju.das.jz@bp.renesas.com> wrote: > > Document support for the Expanded Serial Peripheral Interface (xSPI) > > Controller in the Renesas RZ/G3E (R9A09G047) SoC. > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > Thanks for your patch! > > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/memory-controllers/renesas,rz- > > +++ xspi.yaml > > > +properties: > > + compatible: > > + items: > > + - const: renesas,r9a09g047-xspi # RZ/G3E > > + - const: renesas,rz-xspi # a generic RZ xSPI device > > Is this the same variant of RPC-IF as used on older "RZ" SoCs like > RZ/A1 and RZ/A2? > If the answer is yes, then I do not object against introducing rz-xspi. No, by looking at the registers, I think one on RZ/A1 and RZ/A2 is same as RZ/G2L. So renesas,rzg2l-rpc-if will fit there. Cheers, Biju
Hi Biju, On Thu, 6 Mar 2025 at 11:59, Biju Das <biju.das.jz@bp.renesas.com> wrote: > > -----Original Message----- > > From: Geert Uytterhoeven <geert@linux-m68k.org> > > Sent: 06 March 2025 10:44 > > Subject: Re: [PATCH 1/8] dt-bindings: memory: Document RZ/G3E support > > > > On Fri, 28 Feb 2025 at 17:08, Biju Das <biju.das.jz@bp.renesas.com> wrote: > > > Document support for the Expanded Serial Peripheral Interface (xSPI) > > > Controller in the Renesas RZ/G3E (R9A09G047) SoC. > > > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > > > Thanks for your patch! > > > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/memory-controllers/renesas,rz- > > > +++ xspi.yaml > > > > > +properties: > > > + compatible: > > > + items: > > > + - const: renesas,r9a09g047-xspi # RZ/G3E > > > + - const: renesas,rz-xspi # a generic RZ xSPI device > > > > Is this the same variant of RPC-IF as used on older "RZ" SoCs like > > RZ/A1 and RZ/A2? > > If the answer is yes, then I do not object against introducing rz-xspi. > > No, by looking at the registers, > I think one on RZ/A1 and RZ/A2 is same as RZ/G2L. So renesas,rzg2l-rpc-if > will fit there. In that case I think "renesas,rz-xspi" is a too generic name. Gr{oetje,eeting}s, Geert
Hi Geert, > -----Original Message----- > From: Geert Uytterhoeven <geert@linux-m68k.org> > Sent: 06 March 2025 11:17 > Subject: Re: [PATCH 1/8] dt-bindings: memory: Document RZ/G3E support > > Hi Biju, > > On Thu, 6 Mar 2025 at 11:59, Biju Das <biju.das.jz@bp.renesas.com> wrote: > > > -----Original Message----- > > > From: Geert Uytterhoeven <geert@linux-m68k.org> > > > Sent: 06 March 2025 10:44 > > > Subject: Re: [PATCH 1/8] dt-bindings: memory: Document RZ/G3E > > > support > > > > > > On Fri, 28 Feb 2025 at 17:08, Biju Das <biju.das.jz@bp.renesas.com> wrote: > > > > Document support for the Expanded Serial Peripheral Interface > > > > (xSPI) Controller in the Renesas RZ/G3E (R9A09G047) SoC. > > > > > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > > > > > Thanks for your patch! > > > > > > > --- /dev/null > > > > +++ b/Documentation/devicetree/bindings/memory-controllers/renesas > > > > +++ ,rz- > > > > +++ xspi.yaml > > > > > > > +properties: > > > > + compatible: > > > > + items: > > > > + - const: renesas,r9a09g047-xspi # RZ/G3E > > > > + - const: renesas,rz-xspi # a generic RZ xSPI device > > > > > > Is this the same variant of RPC-IF as used on older "RZ" SoCs like > > > RZ/A1 and RZ/A2? > > > If the answer is yes, then I do not object against introducing rz-xspi. > > > > No, by looking at the registers, > > I think one on RZ/A1 and RZ/A2 is same as RZ/G2L. So > > renesas,rzg2l-rpc-if will fit there. > > In that case I think "renesas,rz-xspi" is a too generic name. if rz-xspi is too generic, what about using rzg3e-xspi? Note: RZ/G3S and RZ/V2H have similar IP's Cheers, Biju
Hi Biju, On Thu, 6 Mar 2025 at 12:25, Biju Das <biju.das.jz@bp.renesas.com> wrote: > > From: Geert Uytterhoeven <geert@linux-m68k.org> > > On Thu, 6 Mar 2025 at 11:59, Biju Das <biju.das.jz@bp.renesas.com> wrote: > > > > -----Original Message----- > > > > From: Geert Uytterhoeven <geert@linux-m68k.org> > > > > Sent: 06 March 2025 10:44 > > > > Subject: Re: [PATCH 1/8] dt-bindings: memory: Document RZ/G3E > > > > support > > > > > > > > On Fri, 28 Feb 2025 at 17:08, Biju Das <biju.das.jz@bp.renesas.com> wrote: > > > > > Document support for the Expanded Serial Peripheral Interface > > > > > (xSPI) Controller in the Renesas RZ/G3E (R9A09G047) SoC. > > > > > > > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > > > > > > > Thanks for your patch! > > > > > > > > > --- /dev/null > > > > > +++ b/Documentation/devicetree/bindings/memory-controllers/renesas > > > > > +++ ,rz- > > > > > +++ xspi.yaml > > > > > > > > > +properties: > > > > > + compatible: > > > > > + items: > > > > > + - const: renesas,r9a09g047-xspi # RZ/G3E > > > > > + - const: renesas,rz-xspi # a generic RZ xSPI device > > > > > > > > Is this the same variant of RPC-IF as used on older "RZ" SoCs like > > > > RZ/A1 and RZ/A2? > > > > If the answer is yes, then I do not object against introducing rz-xspi. > > > > > > No, by looking at the registers, > > > I think one on RZ/A1 and RZ/A2 is same as RZ/G2L. So > > > renesas,rzg2l-rpc-if will fit there. > > > > In that case I think "renesas,rz-xspi" is a too generic name. > > if rz-xspi is too generic, what about using rzg3e-xspi? > > Note: > RZ/G3S and RZ/V2H have similar IP's Just drop the generic fallback? RZ/G3S and RZ/V2H can use "renesas,r9a09g047-xspi" as a fallback. Gr{oetje,eeting}s, Geert
Hi Geert, > -----Original Message----- > From: Geert Uytterhoeven <geert@linux-m68k.org> > Sent: 06 March 2025 12:58 > Subject: Re: [PATCH 1/8] dt-bindings: memory: Document RZ/G3E support > > Hi Biju, > > On Thu, 6 Mar 2025 at 12:25, Biju Das <biju.das.jz@bp.renesas.com> wrote: > > > From: Geert Uytterhoeven <geert@linux-m68k.org> On Thu, 6 Mar 2025 > > > at 11:59, Biju Das <biju.das.jz@bp.renesas.com> wrote: > > > > > -----Original Message----- > > > > > From: Geert Uytterhoeven <geert@linux-m68k.org> > > > > > Sent: 06 March 2025 10:44 > > > > > Subject: Re: [PATCH 1/8] dt-bindings: memory: Document RZ/G3E > > > > > support > > > > > > > > > > On Fri, 28 Feb 2025 at 17:08, Biju Das <biju.das.jz@bp.renesas.com> wrote: > > > > > > Document support for the Expanded Serial Peripheral Interface > > > > > > (xSPI) Controller in the Renesas RZ/G3E (R9A09G047) SoC. > > > > > > > > > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > > > > > > > > > Thanks for your patch! > > > > > > > > > > > --- /dev/null > > > > > > +++ b/Documentation/devicetree/bindings/memory-controllers/ren > > > > > > +++ esas > > > > > > +++ ,rz- > > > > > > +++ xspi.yaml > > > > > > > > > > > +properties: > > > > > > + compatible: > > > > > > + items: > > > > > > + - const: renesas,r9a09g047-xspi # RZ/G3E > > > > > > + - const: renesas,rz-xspi # a generic RZ xSPI device > > > > > > > > > > Is this the same variant of RPC-IF as used on older "RZ" SoCs > > > > > like > > > > > RZ/A1 and RZ/A2? > > > > > If the answer is yes, then I do not object against introducing rz-xspi. > > > > > > > > No, by looking at the registers, > > > > I think one on RZ/A1 and RZ/A2 is same as RZ/G2L. So > > > > renesas,rzg2l-rpc-if will fit there. > > > > > > In that case I think "renesas,rz-xspi" is a too generic name. > > > > if rz-xspi is too generic, what about using rzg3e-xspi? > > > > Note: > > RZ/G3S and RZ/V2H have similar IP's > > Just drop the generic fallback? > RZ/G3S and RZ/V2H can use "renesas,r9a09g047-xspi" as a fallback. Agreed. Cheers, Biju
diff --git a/Documentation/devicetree/bindings/memory-controllers/renesas,rz-xspi.yaml b/Documentation/devicetree/bindings/memory-controllers/renesas,rz-xspi.yaml new file mode 100644 index 000000000000..84875cd28460 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/renesas,rz-xspi.yaml @@ -0,0 +1,137 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/renesas,rz-xspi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas Expanded Serial Peripheral Interface (xSPI) + +maintainers: + - Biju Das <biju.das.jz@bp.renesas.com> + +description: | + Renesas xSPI allows a SPI flash connected to the SoC to be accessed via + the memory-mapping or the manual command mode. + + The flash chip itself should be represented by a subnode of the XSPI node. + The flash interface is selected based on the "compatible" property of this + subnode: + - "jedec,spi-nor"; + +allOf: + - $ref: /schemas/spi/spi-controller.yaml# + +properties: + compatible: + items: + - const: renesas,r9a09g047-xspi # RZ/G3E + - const: renesas,rz-xspi # a generic RZ xSPI device + + reg: + items: + - description: xSPI registers + - description: direct mapping area + + reg-names: + items: + - const: regs + - const: dirmap + + interrupts: + items: + - description: Interrupt pulse signal by factors excluding errors + - description: Interrupt pulse signal by error factors + + interrupt-names: + items: + - const: spi_pulse + - const: spi_err_pulse + + clocks: + items: + - description: AHB clock + - description: AXI clock + - description: SPI clock + - description: Double speed SPI clock + + clock-names: + items: + - const: ahb + - const: axi + - const: spi + - const: spix2 + + power-domains: + maxItems: 1 + + resets: + items: + - description: Hardware reset + - description: AXI reset + + reset-names: + items: + - const: hresetn + - const: aresetn + + renesas,xspi-cs-addr-sys: + $ref: /schemas/types.yaml#/definitions/phandle + description: | + Phandle to the system controller (sys) that allows to configure + xSPI CS0 and CS1 addresses. + +patternProperties: + "flash@[0-9a-f]+$": + type: object + additionalProperties: true + + properties: + compatible: + contains: + const: jedec,spi-nor + +required: + - compatible + - reg + - reg-names + - interrupts + - interrupt-names + - clocks + - clock-names + - power-domains + - resets + - reset-names + - '#address-cells' + - '#size-cells' + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/renesas-cpg-mssr.h> + + spi@11030000 { + compatible = "renesas,r9a09g047-xspi", "renesas,rz-xspi"; + reg = <0x11030000 0x10000>, <0x20000000 0x10000000>; + reg-names = "regs", "dirmap"; + interrupts = <GIC_SPI 228 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 229 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "spi_pulse", "spi_err_pulse"; + clocks = <&cpg CPG_MOD 0x9f>, <&cpg CPG_MOD 0xa0>, + <&cpg CPG_MOD 0xa1>, <&cpg CPG_MOD 0xa1>; + clock-names = "ahb", "axi", "spi", "spix2"; + power-domains = <&cpg>; + resets = <&cpg 0xa3>, <&cpg 0xa4>; + reset-names = "hresetn", "aresetn"; + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; + };
Document support for the Expanded Serial Peripheral Interface (xSPI) Controller in the Renesas RZ/G3E (R9A09G047) SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- .../memory-controllers/renesas,rz-xspi.yaml | 137 ++++++++++++++++++ 1 file changed, 137 insertions(+) create mode 100644 Documentation/devicetree/bindings/memory-controllers/renesas,rz-xspi.yaml