| Message ID | 20250306131016.281290-2-amadeus@jmu.edu.cn (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | arm64: dts: rockchip: enable SCMI clk for RK3528 SoC | expand |
Hi, Am Donnerstag, 6. März 2025, 14:10:16 MEZ schrieb Chukun Pan: > Same as RK3568, RK3528 uses SCMI clk instead of ARMCLK. > Add SCMI clk for CPU, GPU and RNG will also use it. > > Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> > --- > @@ -110,6 +129,19 @@ gmac0_clk: clock-gmac50m { > #clock-cells = <0>; > }; > > + sram@10f000 { That sram is part of the soc (and has an mmio-address), so I'd think it should live inside the soc node? Heiko
Hi, > That sram is part of the soc (and has an mmio-address), so I'd think > it should live inside the soc node? But soc ranges starts from 0xfe000000, I don't know whether to change it. And all other nodes are 0xf..., except this sram. Any suggestions would be greatly appreciated. Thanks, Chukun
Hi Chukun, On 2025-03-06 14:10, Chukun Pan wrote: > Same as RK3568, RK3528 uses SCMI clk instead of ARMCLK. > Add SCMI clk for CPU, GPU and RNG will also use it. > > Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> > --- > arch/arm64/boot/dts/rockchip/rk3528.dtsi | 32 ++++++++++++++++++++++++ > 1 file changed, 32 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi > index 0c0e7f151462..aa68c2fef2f3 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi > @@ -59,6 +59,7 @@ cpu0: cpu@0 { > reg = <0x0>; > device_type = "cpu"; > enable-method = "psci"; > + clocks = <&scmi_clk SCMI_CLK_CPU>; > }; > > cpu1: cpu@1 { > @@ -66,6 +67,7 @@ cpu1: cpu@1 { > reg = <0x1>; > device_type = "cpu"; > enable-method = "psci"; > + clocks = <&scmi_clk SCMI_CLK_CPU>; > }; > > cpu2: cpu@2 { > @@ -73,6 +75,7 @@ cpu2: cpu@2 { > reg = <0x2>; > device_type = "cpu"; > enable-method = "psci"; > + clocks = <&scmi_clk SCMI_CLK_CPU>; > }; > > cpu3: cpu@3 { > @@ -80,6 +83,22 @@ cpu3: cpu@3 { > reg = <0x3>; > device_type = "cpu"; > enable-method = "psci"; > + clocks = <&scmi_clk SCMI_CLK_CPU>; > + }; > + }; > + > + firmware { > + scmi: scmi { > + compatible = "arm,scmi-smc"; > + arm,smc-id = <0x82000010>; > + shmem = <&scmi_shmem>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + scmi_clk: protocol@14 { > + reg = <0x14>; > + #clock-cells = <1>; > + }; > }; > }; > > @@ -110,6 +129,19 @@ gmac0_clk: clock-gmac50m { > #clock-cells = <0>; > }; > > + sram@10f000 { > + compatible = "mmio-sram"; > + reg = <0x0 0x0010f000 0x0 0x100>; > + ranges = <0 0x0 0x0010f000 0x100>; > + #address-cells = <1>; > + #size-cells = <1>; > + > + scmi_shmem: sram@0 { > + compatible = "arm,scmi-shmem"; > + reg = <0x0 0x100>; > + }; > + }; This does not look correct, the shared memory is located in DRAM not in SRAM. I used reserved-memory in my work-in-progress commit for adding the GPU [1], something like, not sure if this is more correct: reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; scmi_shmem: scmi-shmem@10f000 { compatible = "arm,scmi-shmem"; reg = <0x0 0x0010f000 0x0 0x100>; no-map; }; }; [1] https://github.com/Kwiboo/linux-rockchip/commit/f1cd58b2431a01e8cf6a430922204a71fee484f3 Regards, Jonas > + > soc { > compatible = "simple-bus"; > ranges = <0x0 0xfe000000 0x0 0xfe000000 0x0 0x2000000>;
On Thu, Mar 06, 2025 at 09:10:16PM +0800, Chukun Pan wrote: > Same as RK3568, RK3528 uses SCMI clk instead of ARMCLK. > Add SCMI clk for CPU, GPU and RNG will also use it. > It is highly recommended not to use clock protocol for CPUs and GPUs especially if the plan is to drive regulators separately. Please use the performance protocol instead which can abstract the clock and the regulator details for the OS.
diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi index 0c0e7f151462..aa68c2fef2f3 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi @@ -59,6 +59,7 @@ cpu0: cpu@0 { reg = <0x0>; device_type = "cpu"; enable-method = "psci"; + clocks = <&scmi_clk SCMI_CLK_CPU>; }; cpu1: cpu@1 { @@ -66,6 +67,7 @@ cpu1: cpu@1 { reg = <0x1>; device_type = "cpu"; enable-method = "psci"; + clocks = <&scmi_clk SCMI_CLK_CPU>; }; cpu2: cpu@2 { @@ -73,6 +75,7 @@ cpu2: cpu@2 { reg = <0x2>; device_type = "cpu"; enable-method = "psci"; + clocks = <&scmi_clk SCMI_CLK_CPU>; }; cpu3: cpu@3 { @@ -80,6 +83,22 @@ cpu3: cpu@3 { reg = <0x3>; device_type = "cpu"; enable-method = "psci"; + clocks = <&scmi_clk SCMI_CLK_CPU>; + }; + }; + + firmware { + scmi: scmi { + compatible = "arm,scmi-smc"; + arm,smc-id = <0x82000010>; + shmem = <&scmi_shmem>; + #address-cells = <1>; + #size-cells = <0>; + + scmi_clk: protocol@14 { + reg = <0x14>; + #clock-cells = <1>; + }; }; }; @@ -110,6 +129,19 @@ gmac0_clk: clock-gmac50m { #clock-cells = <0>; }; + sram@10f000 { + compatible = "mmio-sram"; + reg = <0x0 0x0010f000 0x0 0x100>; + ranges = <0 0x0 0x0010f000 0x100>; + #address-cells = <1>; + #size-cells = <1>; + + scmi_shmem: sram@0 { + compatible = "arm,scmi-shmem"; + reg = <0x0 0x100>; + }; + }; + soc { compatible = "simple-bus"; ranges = <0x0 0xfe000000 0x0 0xfe000000 0x0 0x2000000>;
Same as RK3568, RK3528 uses SCMI clk instead of ARMCLK. Add SCMI clk for CPU, GPU and RNG will also use it. Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> --- arch/arm64/boot/dts/rockchip/rk3528.dtsi | 32 ++++++++++++++++++++++++ 1 file changed, 32 insertions(+)