Message ID | 20250310111357.1238454-22-karol.kolacinski@intel.com (mailing list archive) |
---|---|
State | Awaiting Upstream |
Delegated to: | Netdev Maintainers |
Headers | show |
Series | ice: Separate TSPLL from PTP and clean up | expand |
Context | Check | Description |
---|---|---|
netdev/tree_selection | success | Guessing tree name failed - patch did not apply |
On 3/10/2025 4:12 AM, Karol Kolacinski wrote: > Initialize TSPLL after initializing PHC in ice_ptp.c instead of calling > for each product in PHC init in ice_ptp_hw.c. > > Reviewed-by: Michal Kubiak <michal.kubiak@intel.com> > Reviewed-by: Milena Olech <milena-olech@intel.com> > Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com> > --- > drivers/net/ethernet/intel/ice/ice_ptp.c | 11 ++++++++++ > drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 24 +-------------------- > drivers/net/ethernet/intel/ice/ice_tspll.c | 5 +++++ > 3 files changed, 17 insertions(+), 23 deletions(-) > > diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c > index fdeb20ac831c..5fbd77e0cb17 100644 > --- a/drivers/net/ethernet/intel/ice/ice_ptp.c > +++ b/drivers/net/ethernet/intel/ice/ice_ptp.c > @@ -2864,6 +2864,10 @@ static int ice_ptp_rebuild_owner(struct ice_pf *pf) > if (err) > return err; > > + err = ice_tspll_init(hw); > + if (err) > + return err; > + > /* Acquire the global hardware lock */ > if (!ice_ptp_lock(hw)) { > err = -EBUSY; > @@ -3038,6 +3042,13 @@ static int ice_ptp_init_owner(struct ice_pf *pf) > return err; > } > > + err = ice_tspll_init(hw); > + if (err) { > + dev_err(ice_pf_to_dev(pf), "Failed to initialize CGU, status %d\n", > + err); > + return err; > + } > + > /* Acquire the global hardware lock */ > if (!ice_ptp_lock(hw)) { > err = -EBUSY; > diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c > index 689feac7baf9..ba97a52917af 100644 > --- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c > +++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c > @@ -2107,22 +2107,6 @@ static void ice_sb_access_ena_eth56g(struct ice_hw *hw, bool enable) > wr32(hw, PF_SB_REM_DEV_CTL, val); > } > > -/** > - * ice_ptp_init_phc_e825 - Perform E825 specific PHC initialization > - * @hw: pointer to HW struct > - * > - * Perform E825-specific PTP hardware clock initialization steps. > - * > - * Return: 0 on success, negative error code otherwise. > - */ > -static int ice_ptp_init_phc_e825(struct ice_hw *hw) > -{ > - ice_sb_access_ena_eth56g(hw, true); Are we losing this call now? > - /* Initialize the Clock Generation Unit */ > - return ice_tspll_init(hw); > -} > - > /** > * ice_ptp_read_tx_hwtstamp_status_eth56g - Get TX timestamp status > * @hw: pointer to the HW struct > @@ -2784,7 +2768,6 @@ static int ice_ptp_set_vernier_wl(struct ice_hw *hw) > */ > static int ice_ptp_init_phc_e82x(struct ice_hw *hw) > { > - int err; > u32 val; > > /* Enable reading switch and PHY registers over the sideband queue */ > @@ -2794,11 +2777,6 @@ static int ice_ptp_init_phc_e82x(struct ice_hw *hw) > val |= (PF_SB_REM_DEV_CTL_SWITCH_READ | PF_SB_REM_DEV_CTL_PHY0); > wr32(hw, PF_SB_REM_DEV_CTL, val); > > - /* Initialize the Clock Generation Unit */ > - err = ice_tspll_init(hw); > - if (err) > - return err; > - > /* Set window length for all the ports */ > return ice_ptp_set_vernier_wl(hw); > } > @@ -5580,7 +5558,7 @@ int ice_ptp_init_phc(struct ice_hw *hw) > case ICE_MAC_GENERIC: > return ice_ptp_init_phc_e82x(hw); > case ICE_MAC_GENERIC_3K_E825: > - return ice_ptp_init_phc_e825(hw); > + return 0; > default: > return -EOPNOTSUPP; > } > diff --git a/drivers/net/ethernet/intel/ice/ice_tspll.c b/drivers/net/ethernet/intel/ice/ice_tspll.c > index 37fcfdd5e032..17c23b29b53c 100644 > --- a/drivers/net/ethernet/intel/ice/ice_tspll.c > +++ b/drivers/net/ethernet/intel/ice/ice_tspll.c > @@ -474,6 +474,11 @@ int ice_tspll_init(struct ice_hw *hw) > enum ice_clk_src clk_src; > int err; > > + /* Only E822, E823 and E825 products support TSPLL */ > + if (hw->mac_type != ICE_MAC_GENERIC && > + hw->mac_type != ICE_MAC_GENERIC_3K_E825) > + return 0; > + > tspll_freq = (enum ice_tspll_freq)ts_info->time_ref; > clk_src = (enum ice_clk_src)ts_info->clk_src; > if (!ice_tspll_check_params(hw, tspll_freq, clk_src))
diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c index fdeb20ac831c..5fbd77e0cb17 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp.c @@ -2864,6 +2864,10 @@ static int ice_ptp_rebuild_owner(struct ice_pf *pf) if (err) return err; + err = ice_tspll_init(hw); + if (err) + return err; + /* Acquire the global hardware lock */ if (!ice_ptp_lock(hw)) { err = -EBUSY; @@ -3038,6 +3042,13 @@ static int ice_ptp_init_owner(struct ice_pf *pf) return err; } + err = ice_tspll_init(hw); + if (err) { + dev_err(ice_pf_to_dev(pf), "Failed to initialize CGU, status %d\n", + err); + return err; + } + /* Acquire the global hardware lock */ if (!ice_ptp_lock(hw)) { err = -EBUSY; diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c index 689feac7baf9..ba97a52917af 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c @@ -2107,22 +2107,6 @@ static void ice_sb_access_ena_eth56g(struct ice_hw *hw, bool enable) wr32(hw, PF_SB_REM_DEV_CTL, val); } -/** - * ice_ptp_init_phc_e825 - Perform E825 specific PHC initialization - * @hw: pointer to HW struct - * - * Perform E825-specific PTP hardware clock initialization steps. - * - * Return: 0 on success, negative error code otherwise. - */ -static int ice_ptp_init_phc_e825(struct ice_hw *hw) -{ - ice_sb_access_ena_eth56g(hw, true); - - /* Initialize the Clock Generation Unit */ - return ice_tspll_init(hw); -} - /** * ice_ptp_read_tx_hwtstamp_status_eth56g - Get TX timestamp status * @hw: pointer to the HW struct @@ -2784,7 +2768,6 @@ static int ice_ptp_set_vernier_wl(struct ice_hw *hw) */ static int ice_ptp_init_phc_e82x(struct ice_hw *hw) { - int err; u32 val; /* Enable reading switch and PHY registers over the sideband queue */ @@ -2794,11 +2777,6 @@ static int ice_ptp_init_phc_e82x(struct ice_hw *hw) val |= (PF_SB_REM_DEV_CTL_SWITCH_READ | PF_SB_REM_DEV_CTL_PHY0); wr32(hw, PF_SB_REM_DEV_CTL, val); - /* Initialize the Clock Generation Unit */ - err = ice_tspll_init(hw); - if (err) - return err; - /* Set window length for all the ports */ return ice_ptp_set_vernier_wl(hw); } @@ -5580,7 +5558,7 @@ int ice_ptp_init_phc(struct ice_hw *hw) case ICE_MAC_GENERIC: return ice_ptp_init_phc_e82x(hw); case ICE_MAC_GENERIC_3K_E825: - return ice_ptp_init_phc_e825(hw); + return 0; default: return -EOPNOTSUPP; } diff --git a/drivers/net/ethernet/intel/ice/ice_tspll.c b/drivers/net/ethernet/intel/ice/ice_tspll.c index 37fcfdd5e032..17c23b29b53c 100644 --- a/drivers/net/ethernet/intel/ice/ice_tspll.c +++ b/drivers/net/ethernet/intel/ice/ice_tspll.c @@ -474,6 +474,11 @@ int ice_tspll_init(struct ice_hw *hw) enum ice_clk_src clk_src; int err; + /* Only E822, E823 and E825 products support TSPLL */ + if (hw->mac_type != ICE_MAC_GENERIC && + hw->mac_type != ICE_MAC_GENERIC_3K_E825) + return 0; + tspll_freq = (enum ice_tspll_freq)ts_info->time_ref; clk_src = (enum ice_clk_src)ts_info->clk_src; if (!ice_tspll_check_params(hw, tspll_freq, clk_src))