| Message ID | 20250318113524.57100-1-j-choudhary@ti.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 45ff65e30deb919604e68faed156ad96ce7474d9 |
| Headers | show |
| Series | ASoC: ti: j721e-evm: Fix clock configuration for ti,j7200-cpb-audio compatible | expand |
On Tue, 18 Mar 2025 17:05:24 +0530, Jayesh Choudhary wrote: > For 'ti,j7200-cpb-audio' compatible, there is support for only one PLL for > 48k. For 11025, 22050, 44100 and 88200 sampling rates, due to absence of > J721E_CLK_PARENT_44100, we get EINVAL while running any audio application. > Add support for these rates by using the 48k parent clock and adjusting > the clock for these rates later in j721e_configure_refclk. > > > [...] Applied to https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next Thanks! [1/1] ASoC: ti: j721e-evm: Fix clock configuration for ti,j7200-cpb-audio compatible commit: 45ff65e30deb919604e68faed156ad96ce7474d9 All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark
diff --git a/sound/soc/ti/j721e-evm.c b/sound/soc/ti/j721e-evm.c index 2057d46ad884..0e7e4ff950b5 100644 --- a/sound/soc/ti/j721e-evm.c +++ b/sound/soc/ti/j721e-evm.c @@ -182,6 +182,8 @@ static int j721e_configure_refclk(struct j721e_priv *priv, clk_id = J721E_CLK_PARENT_48000; else if (!(rate % 11025) && priv->pll_rates[J721E_CLK_PARENT_44100]) clk_id = J721E_CLK_PARENT_44100; + else if (!(rate % 11025) && priv->pll_rates[J721E_CLK_PARENT_48000]) + clk_id = J721E_CLK_PARENT_48000; else return ret;
For 'ti,j7200-cpb-audio' compatible, there is support for only one PLL for 48k. For 11025, 22050, 44100 and 88200 sampling rates, due to absence of J721E_CLK_PARENT_44100, we get EINVAL while running any audio application. Add support for these rates by using the 48k parent clock and adjusting the clock for these rates later in j721e_configure_refclk. Fixes: 6748d0559059 ("ASoC: ti: Add custom machine driver for j721e EVM (CPB and IVI)") Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> --- Error log for J784S4-EVM platform which uses this compatible: <https://gist.github.com/Jayesh2000/22784d790f493ca182bb78c8d5015c9b> After this fix, test log for 44100 rate: <https://gist.github.com/Jayesh2000/13ab5852109f899fa2ceb466f8c130d9> For rates 8k, 16k, 24k, 32k, 48k, 96k the scki used is the default value i.e. 24576000 Hz. When any application request sampling rate from 11025, 22050, 44100 or 88200, the clk_set_rate calls are invoked in j721e_configure_refclk and the scki is modified to 22579200 Hz. sound/soc/ti/j721e-evm.c | 2 ++ 1 file changed, 2 insertions(+)