| Message ID | 20250319-wip-bl-ad3552r-fixes-v1-1-cf10d6fae52a@baylibre.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | iio: dac: ad3552r-hs: add debugfs reg access | expand |
On Wed, 2025-03-19 at 12:02 +0100, Angelo Dureghello wrote: > From: Angelo Dureghello <adureghello@baylibre.com> > > Add debugfs register access. > > Signed-off-by: Angelo Dureghello <adureghello@baylibre.com> > --- Minor nit you might consider to change if a v2 is needed for some reason... Reviewed-by: Nuno Sá <nuno.sa@analog.com> > drivers/iio/dac/ad3552r-hs.c | 31 +++++++++++++++++++++++++++++++ > drivers/iio/dac/ad3552r.h | 2 ++ > 2 files changed, 33 insertions(+) > > diff --git a/drivers/iio/dac/ad3552r-hs.c b/drivers/iio/dac/ad3552r-hs.c > index > cd8dabb60c5548780f0fce5d1b68c494cd71321d..7bb6d8817a545f16de9432526ae28787af1a > 0146 100644 > --- a/drivers/iio/dac/ad3552r-hs.c > +++ b/drivers/iio/dac/ad3552r-hs.c > @@ -7,6 +7,7 @@ > */ > > #include <linux/bitfield.h> > +#include <linux/debugfs.h> > #include <linux/delay.h> > #include <linux/gpio/consumer.h> > #include <linux/iio/backend.h> > @@ -56,6 +57,15 @@ struct ad3552r_hs_state { > u32 config_d; > }; > > +static int ad3552r_hs_get_reg_length(unsigned int reg) > +{ > + /* > + * There is no 3 or 4 bytes r/w len possible in HDL, so keeping 2 > + * also for the 24bit area. > + */ > + return (reg > AD3552R_SECONDARY_REGION_START) ? 2 : 1; > +} > + I wonder about the added value of the above. Since it's really only used once, I would do it inline
diff --git a/drivers/iio/dac/ad3552r-hs.c b/drivers/iio/dac/ad3552r-hs.c index cd8dabb60c5548780f0fce5d1b68c494cd71321d..7bb6d8817a545f16de9432526ae28787af1a0146 100644 --- a/drivers/iio/dac/ad3552r-hs.c +++ b/drivers/iio/dac/ad3552r-hs.c @@ -7,6 +7,7 @@ */ #include <linux/bitfield.h> +#include <linux/debugfs.h> #include <linux/delay.h> #include <linux/gpio/consumer.h> #include <linux/iio/backend.h> @@ -56,6 +57,15 @@ struct ad3552r_hs_state { u32 config_d; }; +static int ad3552r_hs_get_reg_length(unsigned int reg) +{ + /* + * There is no 3 or 4 bytes r/w len possible in HDL, so keeping 2 + * also for the 24bit area. + */ + return (reg > AD3552R_SECONDARY_REGION_START) ? 2 : 1; +} + static int ad3552r_hs_reg_read(struct ad3552r_hs_state *st, u32 reg, u32 *val, size_t xfer_size) { @@ -464,6 +474,26 @@ static int ad3552r_hs_setup_custom_gain(struct ad3552r_hs_state *st, gain, 1); } +static int ad3552r_hs_reg_access(struct iio_dev *indio_dev, unsigned int reg, + unsigned int writeval, unsigned int *readval) +{ + struct ad3552r_hs_state *st = iio_priv(indio_dev); + int size_xfer, max_reg_addr; + + max_reg_addr = (st->model_data->num_hw_channels == 2) ? + AD3552R_REG_ADDR_MAX : AD3551R_REG_ADDR_MAX; + + if (reg > max_reg_addr) + return -EINVAL; + + size_xfer = ad3552r_hs_get_reg_length(reg); + + if (readval) + return ad3552r_hs_reg_read(st, reg, readval, size_xfer); + + return st->data->bus_reg_write(st->back, reg, writeval, size_xfer); +} + static int ad3552r_hs_setup(struct ad3552r_hs_state *st) { u16 id; @@ -639,6 +669,7 @@ static const struct iio_chan_spec ad3552r_hs_channels[] = { static const struct iio_info ad3552r_hs_info = { .read_raw = &ad3552r_hs_read_raw, .write_raw = &ad3552r_hs_write_raw, + .debugfs_reg_access = &ad3552r_hs_reg_access, }; static int ad3552r_hs_probe(struct platform_device *pdev) diff --git a/drivers/iio/dac/ad3552r.h b/drivers/iio/dac/ad3552r.h index 768fa264d39e9e6d517aeb4098382e072f153543..69ce96f132cdb353d2f140939c534586cb791aee 100644 --- a/drivers/iio/dac/ad3552r.h +++ b/drivers/iio/dac/ad3552r.h @@ -113,6 +113,8 @@ #define AD3552R_REG_ADDR_INPUT_PAGE_MASK_24B 0x44 #define AD3552R_REG_ADDR_SW_LDAC_24B 0x45 #define AD3552R_REG_ADDR_CH_INPUT_24B(ch) (0x4B - (1 - (ch)) * 3) +#define AD3551R_REG_ADDR_MAX 0x46 +#define AD3552R_REG_ADDR_MAX 0x49 #define AD3552R_MAX_CH 2 #define AD3552R_MASK_CH(ch) BIT(ch)