| Message ID | 20250319214415.3086027-6-jonas@kwiboo.se (mailing list archive) |
|---|---|
| State | New |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | net: stmmac: dwmac-rk: Add GMAC support for RK3528 | expand |
On Wed, Mar 19, 2025 at 09:44:09PM +0000, Jonas Karlman wrote: > Rockchip RK3528 (and RV1106) has a different integrated PHY compared to > the integrated PHY on RK3228/RK3328. What ID does this PHY have? Is it just the reset which is different, or is it actually a different PHY, and the rockchip PHY driver needs additions? Andrew
Hi Andrew, On 2025-03-20 00:27, Andrew Lunn wrote: > On Wed, Mar 19, 2025 at 09:44:09PM +0000, Jonas Karlman wrote: >> Rockchip RK3528 (and RV1106) has a different integrated PHY compared to >> the integrated PHY on RK3228/RK3328. > > What ID does this PHY have? Is it just the reset which is different, > or is it actually a different PHY, and the rockchip PHY driver needs > additions? Sorry, look like I missed to include the phy-id reported in this patch and only included that detail in the related device tree patch [1]. This PHY seem to be different compared to the PHY used in older SoCs. The PHY identified on addr 0x2 as 0044.1400 and in vendor kernel this relate to the Rockchip RK630 PHY [2]. #define RK630_PHY_ID 0x00441400 /* * Fixed address: * Addr: 1 --- RK630@S40 * 2 --- RV1106@T22 */ #define PHY_ADDR_S40 1 #define PHY_ADDR_T22 2 [1] https://lore.kernel.org/all/20250310001254.1516138-2-jonas@kwiboo.se/ [2] https://github.com/armbian/linux-rockchip/blob/rk-6.1-rkr5/drivers/net/phy/rk630phy.c Regards, Jonas > > Andrew
> #define RK630_PHY_ID 0x00441400 O.K. different which is good. > /* > * Fixed address: > * Addr: 1 --- RK630@S40 > * 2 --- RV1106@T22 > */ > #define PHY_ADDR_S40 1 > #define PHY_ADDR_T22 2 > > [1] https://lore.kernel.org/all/20250310001254.1516138-2-jonas@kwiboo.se/ > [2] https://github.com/armbian/linux-rockchip/blob/rk-6.1-rkr5/drivers/net/phy/rk630phy.c The vendor driver is going to need some cleanup before you post it.... Andrew
On Wed, Mar 19, 2025 at 09:44:09PM +0000, Jonas Karlman wrote: > Rockchip RK3528 (and RV1106) has a different integrated PHY compared to > the integrated PHY on RK3228/RK3328. Current powerup/down operation is > not compatible with the integrated PHY found in these newer SoCs. > > Add operations to powerup/down the integrated PHY found in RK3528. > Use helpers that can be used by other GMAC variants in the future. > > Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Andrew
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c index 3673abd65302..700858ff6f7c 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c @@ -134,6 +134,35 @@ static void rk_gmac_integrated_ephy_powerdown(struct rk_priv_data *priv) reset_control_assert(priv->phy_reset); } +#define RK_FEPHY_SHUTDOWN GRF_BIT(1) +#define RK_FEPHY_POWERUP GRF_CLR_BIT(1) +#define RK_FEPHY_INTERNAL_RMII_SEL GRF_BIT(6) +#define RK_FEPHY_24M_CLK_SEL (GRF_BIT(8) | GRF_BIT(9)) +#define RK_FEPHY_PHY_ID GRF_BIT(11) + +static void rk_gmac_integrated_fephy_powerup(struct rk_priv_data *priv, + unsigned int reg) +{ + reset_control_assert(priv->phy_reset); + usleep_range(20, 30); + + regmap_write(priv->grf, reg, + RK_FEPHY_POWERUP | + RK_FEPHY_INTERNAL_RMII_SEL | + RK_FEPHY_24M_CLK_SEL | + RK_FEPHY_PHY_ID); + usleep_range(10000, 12000); + + reset_control_deassert(priv->phy_reset); + usleep_range(50000, 60000); +} + +static void rk_gmac_integrated_fephy_powerdown(struct rk_priv_data *priv, + unsigned int reg) +{ + regmap_write(priv->grf, reg, RK_FEPHY_SHUTDOWN); +} + #define PX30_GRF_GMAC_CON1 0x0904 /* PX30_GRF_GMAC_CON1 */ @@ -993,12 +1022,24 @@ static void rk3528_set_clock_selection(struct rk_priv_data *bsp_priv, } } +static void rk3528_integrated_phy_powerup(struct rk_priv_data *bsp_priv) +{ + rk_gmac_integrated_fephy_powerup(bsp_priv, RK3528_VO_GRF_MACPHY_CON0); +} + +static void rk3528_integrated_phy_powerdown(struct rk_priv_data *bsp_priv) +{ + rk_gmac_integrated_fephy_powerdown(bsp_priv, RK3528_VO_GRF_MACPHY_CON0); +} + static const struct rk_gmac_ops rk3528_ops = { .set_to_rgmii = rk3528_set_to_rgmii, .set_to_rmii = rk3528_set_to_rmii, .set_rgmii_speed = rk3528_set_rgmii_speed, .set_rmii_speed = rk3528_set_rmii_speed, .set_clock_selection = rk3528_set_clock_selection, + .integrated_phy_powerup = rk3528_integrated_phy_powerup, + .integrated_phy_powerdown = rk3528_integrated_phy_powerdown, .regs_valid = true, .regs = { 0xffbd0000, /* gmac0 */
Rockchip RK3528 (and RV1106) has a different integrated PHY compared to the integrated PHY on RK3228/RK3328. Current powerup/down operation is not compatible with the integrated PHY found in these newer SoCs. Add operations to powerup/down the integrated PHY found in RK3528. Use helpers that can be used by other GMAC variants in the future. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> --- Changes in v3: - No change Changes in v2: - New patch This is enough to power up the integrated PHY on RK3528 for MDIO/MII. However, a PHY driver is still missing and I do not have any RK3528 board that make use of this MAC and PHY, so something that can be improved upon in the future. --- .../net/ethernet/stmicro/stmmac/dwmac-rk.c | 41 +++++++++++++++++++ 1 file changed, 41 insertions(+)