Message ID | 20250402102723.219960-3-quic_mmanikan@quicinc.com (mailing list archive) |
---|---|
State | Changes Requested |
Headers | show |
Series | Add PCIe support for IPQ5424 | expand |
On Wed, Apr 02, 2025 at 03:57:23PM +0530, Manikanta Mylavarapu wrote: > Enable the PCIe controller and PHY nodes corresponding to RDP466. > > Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> > --- > Changes in V6: > - No change. > > arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 41 ++++++++++++++++++++- > 1 file changed, 40 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts > index 0fd0ebe0251d..1f89530cb035 100644 > --- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts > +++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts > @@ -82,6 +82,32 @@ &dwc_1 { > dr_mode = "host"; > }; > > +&pcie2 { > + pinctrl-0 = <&pcie2_default_state>; > + pinctrl-names = "default"; > + > + perst-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>; No wake-gpios? Please document it in the commit message. > + > + status = "okay"; > +}; > + > +&pcie2_phy { > + status = "okay"; > +}; > + > +&pcie3 { > + pinctrl-0 = <&pcie3_default_state>; > + pinctrl-names = "default"; > + > + perst-gpios = <&tlmm 34 GPIO_ACTIVE_LOW>; > + > + status = "okay"; > +}; > + > +&pcie3_phy { > + status = "okay"; > +}; > + > &qusb_phy_0 { > vdd-supply = <&vreg_misc_0p925>; > vdda-pll-supply = <&vreg_misc_1p8>; > @@ -197,6 +223,20 @@ data-pins { > bias-pull-up; > }; > }; > + > + pcie2_default_state: pcie2-default-state { > + pins = "gpio31"; > + function = "gpio"; > + drive-strength = <8>; > + bias-pull-up; > + }; > + > + pcie3_default_state: pcie3-default-state { > + pins = "gpio34"; > + function = "gpio"; > + drive-strength = <8>; > + bias-pull-up; > + }; > }; > > &uart1 { > @@ -216,4 +256,3 @@ &usb3 { > &xo_board { > clock-frequency = <24000000>; > }; > - > -- > 2.34.1 >
On 4/2/2025 7:50 PM, Dmitry Baryshkov wrote: > On Wed, Apr 02, 2025 at 03:57:23PM +0530, Manikanta Mylavarapu wrote: >> Enable the PCIe controller and PHY nodes corresponding to RDP466. >> >> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> >> --- >> Changes in V6: >> - No change. >> >> arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 41 ++++++++++++++++++++- >> 1 file changed, 40 insertions(+), 1 deletion(-) >> >> diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >> index 0fd0ebe0251d..1f89530cb035 100644 >> --- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >> +++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >> @@ -82,6 +82,32 @@ &dwc_1 { >> dr_mode = "host"; >> }; >> >> +&pcie2 { >> + pinctrl-0 = <&pcie2_default_state>; >> + pinctrl-names = "default"; >> + >> + perst-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>; > > > No wake-gpios? Please document it in the commit message. > Hi Dmitry, Thank you for reviewing the patch. The wake GPIO is dropped because the PCIe on the IPQ5424 doesn't support low power mode. I will document this information in the commit message and post the next version. Thanks & Regards, Manikanta.
On Thu, 3 Apr 2025 at 08:08, Manikanta Mylavarapu <quic_mmanikan@quicinc.com> wrote: > > > > On 4/2/2025 7:50 PM, Dmitry Baryshkov wrote: > > On Wed, Apr 02, 2025 at 03:57:23PM +0530, Manikanta Mylavarapu wrote: > >> Enable the PCIe controller and PHY nodes corresponding to RDP466. > >> > >> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> > >> --- > >> Changes in V6: > >> - No change. > >> > >> arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 41 ++++++++++++++++++++- > >> 1 file changed, 40 insertions(+), 1 deletion(-) > >> > >> diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts > >> index 0fd0ebe0251d..1f89530cb035 100644 > >> --- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts > >> +++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts > >> @@ -82,6 +82,32 @@ &dwc_1 { > >> dr_mode = "host"; > >> }; > >> > >> +&pcie2 { > >> + pinctrl-0 = <&pcie2_default_state>; > >> + pinctrl-names = "default"; > >> + > >> + perst-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>; > > > > > > No wake-gpios? Please document it in the commit message. > > > > Hi Dmitry, > > Thank you for reviewing the patch. > > The wake GPIO is dropped because the PCIe on the IPQ5424 doesn't support low power mode. > I will document this information in the commit message and post the next version. If the GPIO is routed on the PCB I think it should still be described in the DT.
On 4/3/25 11:32 AM, Dmitry Baryshkov wrote: > On Thu, 3 Apr 2025 at 08:08, Manikanta Mylavarapu > <quic_mmanikan@quicinc.com> wrote: >> >> >> >> On 4/2/2025 7:50 PM, Dmitry Baryshkov wrote: >>> On Wed, Apr 02, 2025 at 03:57:23PM +0530, Manikanta Mylavarapu wrote: >>>> Enable the PCIe controller and PHY nodes corresponding to RDP466. >>>> >>>> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> >>>> --- >>>> Changes in V6: >>>> - No change. >>>> >>>> arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 41 ++++++++++++++++++++- >>>> 1 file changed, 40 insertions(+), 1 deletion(-) >>>> >>>> diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >>>> index 0fd0ebe0251d..1f89530cb035 100644 >>>> --- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >>>> +++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >>>> @@ -82,6 +82,32 @@ &dwc_1 { >>>> dr_mode = "host"; >>>> }; >>>> >>>> +&pcie2 { >>>> + pinctrl-0 = <&pcie2_default_state>; >>>> + pinctrl-names = "default"; >>>> + >>>> + perst-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>; >>> >>> >>> No wake-gpios? Please document it in the commit message. >>> >> >> Hi Dmitry, >> >> Thank you for reviewing the patch. >> >> The wake GPIO is dropped because the PCIe on the IPQ5424 doesn't support low power mode. >> I will document this information in the commit message and post the next version. > > If the GPIO is routed on the PCB I think it should still be described in the DT. Even basic s2idle can be woken up from, please describe it. Konrad
On 4/3/2025 3:02 PM, Dmitry Baryshkov wrote: > On Thu, 3 Apr 2025 at 08:08, Manikanta Mylavarapu > <quic_mmanikan@quicinc.com> wrote: >> >> >> >> On 4/2/2025 7:50 PM, Dmitry Baryshkov wrote: >>> On Wed, Apr 02, 2025 at 03:57:23PM +0530, Manikanta Mylavarapu wrote: >>>> Enable the PCIe controller and PHY nodes corresponding to RDP466. >>>> >>>> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> >>>> --- >>>> Changes in V6: >>>> - No change. >>>> >>>> arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 41 ++++++++++++++++++++- >>>> 1 file changed, 40 insertions(+), 1 deletion(-) >>>> >>>> diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >>>> index 0fd0ebe0251d..1f89530cb035 100644 >>>> --- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >>>> +++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >>>> @@ -82,6 +82,32 @@ &dwc_1 { >>>> dr_mode = "host"; >>>> }; >>>> >>>> +&pcie2 { >>>> + pinctrl-0 = <&pcie2_default_state>; >>>> + pinctrl-names = "default"; >>>> + >>>> + perst-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>; >>> >>> >>> No wake-gpios? Please document it in the commit message. >>> >> >> Hi Dmitry, >> >> Thank you for reviewing the patch. >> >> The wake GPIO is dropped because the PCIe on the IPQ5424 doesn't support low power mode. >> I will document this information in the commit message and post the next version. > > If the GPIO is routed on the PCB I think it should still be described in the DT. > > Hi Dmitry, I have confirmed with the hardware team that the wake GPIO is not routed on the PCB. Thanks & Regards, Manikanta.
On 08/04/2025 15:49, Manikanta Mylavarapu wrote: > > > On 4/3/2025 3:02 PM, Dmitry Baryshkov wrote: >> On Thu, 3 Apr 2025 at 08:08, Manikanta Mylavarapu >> <quic_mmanikan@quicinc.com> wrote: >>> >>> >>> >>> On 4/2/2025 7:50 PM, Dmitry Baryshkov wrote: >>>> On Wed, Apr 02, 2025 at 03:57:23PM +0530, Manikanta Mylavarapu wrote: >>>>> Enable the PCIe controller and PHY nodes corresponding to RDP466. >>>>> >>>>> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> >>>>> --- >>>>> Changes in V6: >>>>> - No change. >>>>> >>>>> arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 41 ++++++++++++++++++++- >>>>> 1 file changed, 40 insertions(+), 1 deletion(-) >>>>> >>>>> diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >>>>> index 0fd0ebe0251d..1f89530cb035 100644 >>>>> --- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >>>>> +++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >>>>> @@ -82,6 +82,32 @@ &dwc_1 { >>>>> dr_mode = "host"; >>>>> }; >>>>> >>>>> +&pcie2 { >>>>> + pinctrl-0 = <&pcie2_default_state>; >>>>> + pinctrl-names = "default"; >>>>> + >>>>> + perst-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>; >>>> >>>> >>>> No wake-gpios? Please document it in the commit message. >>>> >>> >>> Hi Dmitry, >>> >>> Thank you for reviewing the patch. >>> >>> The wake GPIO is dropped because the PCIe on the IPQ5424 doesn't support low power mode. >>> I will document this information in the commit message and post the next version. >> >> If the GPIO is routed on the PCB I think it should still be described in the DT. >> >> > > Hi Dmitry, > > I have confirmed with the hardware team that the wake GPIO is not routed on the PCB. Sad. Please mention it in the commit message. > > Thanks & Regards, > Manikanta. >
On 4/8/2025 7:00 PM, Dmitry Baryshkov wrote: > On 08/04/2025 15:49, Manikanta Mylavarapu wrote: >> >> >> On 4/3/2025 3:02 PM, Dmitry Baryshkov wrote: >>> On Thu, 3 Apr 2025 at 08:08, Manikanta Mylavarapu >>> <quic_mmanikan@quicinc.com> wrote: >>>> >>>> >>>> >>>> On 4/2/2025 7:50 PM, Dmitry Baryshkov wrote: >>>>> On Wed, Apr 02, 2025 at 03:57:23PM +0530, Manikanta Mylavarapu wrote: >>>>>> Enable the PCIe controller and PHY nodes corresponding to RDP466. >>>>>> >>>>>> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> >>>>>> --- >>>>>> Changes in V6: >>>>>> - No change. >>>>>> >>>>>> arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 41 ++++++++++++++++++++- >>>>>> 1 file changed, 40 insertions(+), 1 deletion(-) >>>>>> >>>>>> diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >>>>>> index 0fd0ebe0251d..1f89530cb035 100644 >>>>>> --- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >>>>>> +++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >>>>>> @@ -82,6 +82,32 @@ &dwc_1 { >>>>>> dr_mode = "host"; >>>>>> }; >>>>>> >>>>>> +&pcie2 { >>>>>> + pinctrl-0 = <&pcie2_default_state>; >>>>>> + pinctrl-names = "default"; >>>>>> + >>>>>> + perst-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>; >>>>> >>>>> >>>>> No wake-gpios? Please document it in the commit message. >>>>> >>>> >>>> Hi Dmitry, >>>> >>>> Thank you for reviewing the patch. >>>> >>>> The wake GPIO is dropped because the PCIe on the IPQ5424 doesn't support low power mode. >>>> I will document this information in the commit message and post the next version. >>> >>> If the GPIO is routed on the PCB I think it should still be described in the DT. >>> >>> >> >> Hi Dmitry, >> >> I have confirmed with the hardware team that the wake GPIO is not routed on the PCB. > > Sad. Please mention it in the commit message. > Okay, sure. Thanks & Regards, Manikanta.
On 4/4/2025 2:19 AM, Konrad Dybcio wrote: > On 4/3/25 11:32 AM, Dmitry Baryshkov wrote: >> On Thu, 3 Apr 2025 at 08:08, Manikanta Mylavarapu >> <quic_mmanikan@quicinc.com> wrote: >>> >>> >>> >>> On 4/2/2025 7:50 PM, Dmitry Baryshkov wrote: >>>> On Wed, Apr 02, 2025 at 03:57:23PM +0530, Manikanta Mylavarapu wrote: >>>>> Enable the PCIe controller and PHY nodes corresponding to RDP466. >>>>> >>>>> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> >>>>> --- >>>>> Changes in V6: >>>>> - No change. >>>>> >>>>> arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 41 ++++++++++++++++++++- >>>>> 1 file changed, 40 insertions(+), 1 deletion(-) >>>>> >>>>> diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >>>>> index 0fd0ebe0251d..1f89530cb035 100644 >>>>> --- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >>>>> +++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >>>>> @@ -82,6 +82,32 @@ &dwc_1 { >>>>> dr_mode = "host"; >>>>> }; >>>>> >>>>> +&pcie2 { >>>>> + pinctrl-0 = <&pcie2_default_state>; >>>>> + pinctrl-names = "default"; >>>>> + >>>>> + perst-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>; >>>> >>>> >>>> No wake-gpios? Please document it in the commit message. >>>> >>> >>> Hi Dmitry, >>> >>> Thank you for reviewing the patch. >>> >>> The wake GPIO is dropped because the PCIe on the IPQ5424 doesn't support low power mode. >>> I will document this information in the commit message and post the next version. >> >> If the GPIO is routed on the PCB I think it should still be described in the DT. > > Even basic s2idle can be woken up from, please describe it. > Hi Konrad, Thank you for reviewing the patch. When the system enters the s2idle state after the PCIe link is established, the link remains active, and no devices are suspended. Consequently, upon waking up from s2idle, there is no need to resume PCIe devices since the link remains active. Thanks & Regards, Manikanta.
diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts index 0fd0ebe0251d..1f89530cb035 100644 --- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts +++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts @@ -82,6 +82,32 @@ &dwc_1 { dr_mode = "host"; }; +&pcie2 { + pinctrl-0 = <&pcie2_default_state>; + pinctrl-names = "default"; + + perst-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>; + + status = "okay"; +}; + +&pcie2_phy { + status = "okay"; +}; + +&pcie3 { + pinctrl-0 = <&pcie3_default_state>; + pinctrl-names = "default"; + + perst-gpios = <&tlmm 34 GPIO_ACTIVE_LOW>; + + status = "okay"; +}; + +&pcie3_phy { + status = "okay"; +}; + &qusb_phy_0 { vdd-supply = <&vreg_misc_0p925>; vdda-pll-supply = <&vreg_misc_1p8>; @@ -197,6 +223,20 @@ data-pins { bias-pull-up; }; }; + + pcie2_default_state: pcie2-default-state { + pins = "gpio31"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; + + pcie3_default_state: pcie3-default-state { + pins = "gpio34"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; }; &uart1 { @@ -216,4 +256,3 @@ &usb3 { &xo_board { clock-frequency = <24000000>; }; -
Enable the PCIe controller and PHY nodes corresponding to RDP466. Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> --- Changes in V6: - No change. arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 41 ++++++++++++++++++++- 1 file changed, 40 insertions(+), 1 deletion(-)