diff mbox series

[09/13] arm64: dts: freescale: imx93-phyboard-segin: Add RTC support

Message ID 20250410090251.1103979-10-primoz.fiser@norik.com (mailing list archive)
State New
Headers show
Series Update PHYTEC i.MX93 DTS | expand

Commit Message

Primoz Fiser April 10, 2025, 9:02 a.m. UTC 
Add support for RTC clock connected via I2C on phyBOARD-Segin-i.MX93.
Make I2C RTC the default clock by configuring the aliases.

Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
---
 .../dts/freescale/imx93-phyboard-segin.dts    | 36 +++++++++++++++++++
 1 file changed, 36 insertions(+)

Comments

Frank Li April 10, 2025, 3:12 p.m. UTC | #1 
On Thu, Apr 10, 2025 at 11:02:47AM +0200, Primoz Fiser wrote:
> Add support for RTC clock connected via I2C on phyBOARD-Segin-i.MX93.
> Make I2C RTC the default clock by configuring the aliases.

"Add support for RTC connected via I2C on phyBOARD-Segin-i.MX93. Set
default RTC by configuring the aliases."

Frank
>
> Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
> ---
>  .../dts/freescale/imx93-phyboard-segin.dts    | 36 +++++++++++++++++++
>  1 file changed, 36 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> index 525f52789f8b..38b89398e646 100644
> --- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> +++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> @@ -17,6 +17,11 @@ /{
>  	compatible = "phytec,imx93-phyboard-segin", "phytec,imx93-phycore-som",
>  		     "fsl,imx93";
>
> +	aliases {
> +		rtc0 = &i2c_rtc;
> +		rtc1 = &bbnsm_rtc;
> +	};
> +
>  	chosen {
>  		stdout-path = &lpuart1;
>  	};
> @@ -33,6 +38,24 @@ reg_usdhc2_vmmc: regulator-usdhc2 {
>  	};
>  };
>
> +/* I2C2 */
> +&lpi2c2 {
> +	clock-frequency = <400000>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_lpi2c2>;
> +	status = "okay";
> +
> +	/* RTC */
> +	i2c_rtc: rtc@68 {
> +		compatible = "microcrystal,rv4162";
> +		reg = <0x68>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_rtc>;
> +		interrupt-parent = <&gpio4>;
> +		interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
> +	};
> +};
> +
>  /* Console */
>  &lpuart1 {
>  	pinctrl-names = "default";
> @@ -56,6 +79,13 @@ &usdhc2 {
>  };
>
>  &iomuxc {
> +	pinctrl_lpi2c2: lpi2c2grp {
> +		fsl,pins = <
> +			MX93_PAD_I2C2_SCL__LPI2C2_SCL		0x40000b9e
> +			MX93_PAD_I2C2_SDA__LPI2C2_SDA		0x40000b9e
> +		>;
> +	};
> +
>  	pinctrl_uart1: uart1grp {
>  		fsl,pins = <
>  			MX93_PAD_UART1_RXD__LPUART1_RX		0x31e
> @@ -69,6 +99,12 @@ MX93_PAD_SD2_RESET_B__GPIO3_IO07	0x31e
>  		>;
>  	};
>
> +	pinctrl_rtc: rtcgrp {
> +		fsl,pins = <
> +			MX93_PAD_ENET2_RD2__GPIO4_IO26		0x31e
> +		>;
> +	};
> +

keep order by node name.

Frank
>  	pinctrl_usdhc2_cd: usdhc2cdgrp {
>  		fsl,pins = <
>  			MX93_PAD_SD2_CD_B__GPIO3_IO00		0x31e
> --
> 2.34.1
>
Primoz Fiser April 11, 2025, 7:51 a.m. UTC | #2 
Hi Frank,

On 10. 04. 25 17:12, Frank Li wrote:
> On Thu, Apr 10, 2025 at 11:02:47AM +0200, Primoz Fiser wrote:
>> Add support for RTC clock connected via I2C on phyBOARD-Segin-i.MX93.
>> Make I2C RTC the default clock by configuring the aliases.
> 
> "Add support for RTC connected via I2C on phyBOARD-Segin-i.MX93. Set
> default RTC by configuring the aliases."
> 
> Frank
>>
>> Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
>> ---
>>  .../dts/freescale/imx93-phyboard-segin.dts    | 36 +++++++++++++++++++
>>  1 file changed, 36 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
>> index 525f52789f8b..38b89398e646 100644
>> --- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
>> +++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
>> @@ -17,6 +17,11 @@ /{
>>  	compatible = "phytec,imx93-phyboard-segin", "phytec,imx93-phycore-som",
>>  		     "fsl,imx93";
>>
>> +	aliases {
>> +		rtc0 = &i2c_rtc;
>> +		rtc1 = &bbnsm_rtc;
>> +	};
>> +
>>  	chosen {
>>  		stdout-path = &lpuart1;
>>  	};
>> @@ -33,6 +38,24 @@ reg_usdhc2_vmmc: regulator-usdhc2 {
>>  	};
>>  };
>>
>> +/* I2C2 */
>> +&lpi2c2 {
>> +	clock-frequency = <400000>;
>> +	pinctrl-names = "default";
>> +	pinctrl-0 = <&pinctrl_lpi2c2>;
>> +	status = "okay";
>> +
>> +	/* RTC */
>> +	i2c_rtc: rtc@68 {
>> +		compatible = "microcrystal,rv4162";
>> +		reg = <0x68>;
>> +		pinctrl-names = "default";
>> +		pinctrl-0 = <&pinctrl_rtc>;
>> +		interrupt-parent = <&gpio4>;
>> +		interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
>> +	};
>> +};
>> +
>>  /* Console */
>>  &lpuart1 {
>>  	pinctrl-names = "default";
>> @@ -56,6 +79,13 @@ &usdhc2 {
>>  };
>>
>>  &iomuxc {
>> +	pinctrl_lpi2c2: lpi2c2grp {
>> +		fsl,pins = <
>> +			MX93_PAD_I2C2_SCL__LPI2C2_SCL		0x40000b9e
>> +			MX93_PAD_I2C2_SDA__LPI2C2_SDA		0x40000b9e
>> +		>;
>> +	};
>> +
>>  	pinctrl_uart1: uart1grp {
>>  		fsl,pins = <
>>  			MX93_PAD_UART1_RXD__LPUART1_RX		0x31e
>> @@ -69,6 +99,12 @@ MX93_PAD_SD2_RESET_B__GPIO3_IO07	0x31e
>>  		>;
>>  	};
>>
>> +	pinctrl_rtc: rtcgrp {
>> +		fsl,pins = <
>> +			MX93_PAD_ENET2_RD2__GPIO4_IO26		0x31e
>> +		>;
>> +	};
>> +
> 
> keep order by node name.
> 

pinctrl_uart1 was out of order since beginning.

I will create a separate patch to this series ordering nodes
alphabetically as a last step.

OK?


> Frank
>>  	pinctrl_usdhc2_cd: usdhc2cdgrp {
>>  		fsl,pins = <
>>  			MX93_PAD_SD2_CD_B__GPIO3_IO00		0x31e
>> --
>> 2.34.1
>>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
index 525f52789f8b..38b89398e646 100644
--- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
@@ -17,6 +17,11 @@  /{
 	compatible = "phytec,imx93-phyboard-segin", "phytec,imx93-phycore-som",
 		     "fsl,imx93";
 
+	aliases {
+		rtc0 = &i2c_rtc;
+		rtc1 = &bbnsm_rtc;
+	};
+
 	chosen {
 		stdout-path = &lpuart1;
 	};
@@ -33,6 +38,24 @@  reg_usdhc2_vmmc: regulator-usdhc2 {
 	};
 };
 
+/* I2C2 */
+&lpi2c2 {
+	clock-frequency = <400000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_lpi2c2>;
+	status = "okay";
+
+	/* RTC */
+	i2c_rtc: rtc@68 {
+		compatible = "microcrystal,rv4162";
+		reg = <0x68>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_rtc>;
+		interrupt-parent = <&gpio4>;
+		interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
+	};
+};
+
 /* Console */
 &lpuart1 {
 	pinctrl-names = "default";
@@ -56,6 +79,13 @@  &usdhc2 {
 };
 
 &iomuxc {
+	pinctrl_lpi2c2: lpi2c2grp {
+		fsl,pins = <
+			MX93_PAD_I2C2_SCL__LPI2C2_SCL		0x40000b9e
+			MX93_PAD_I2C2_SDA__LPI2C2_SDA		0x40000b9e
+		>;
+	};
+
 	pinctrl_uart1: uart1grp {
 		fsl,pins = <
 			MX93_PAD_UART1_RXD__LPUART1_RX		0x31e
@@ -69,6 +99,12 @@  MX93_PAD_SD2_RESET_B__GPIO3_IO07	0x31e
 		>;
 	};
 
+	pinctrl_rtc: rtcgrp {
+		fsl,pins = <
+			MX93_PAD_ENET2_RD2__GPIO4_IO26		0x31e
+		>;
+	};
+
 	pinctrl_usdhc2_cd: usdhc2cdgrp {
 		fsl,pins = <
 			MX93_PAD_SD2_CD_B__GPIO3_IO00		0x31e