Message ID | 20250408154236.49421-2-laurentiumihalcea111@gmail.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | imx8mp: add support for the IMX AIPSTZ bridge | expand |
On Tue, Apr 08, 2025 at 11:42:31AM -0400, Laurentiu Mihalcea wrote: > From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> > > Add documentation for IMX AIPSTZ bridge. > > Co-developed-by: Daniel Baluta <daniel.baluta@nxp.com> > Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> > Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> > --- > .../bindings/bus/fsl,imx8mp-aipstz.yaml | 104 ++++++++++++++++++ > 1 file changed, 104 insertions(+) > create mode 100644 Documentation/devicetree/bindings/bus/fsl,imx8mp-aipstz.yaml > > diff --git a/Documentation/devicetree/bindings/bus/fsl,imx8mp-aipstz.yaml b/Documentation/devicetree/bindings/bus/fsl,imx8mp-aipstz.yaml > new file mode 100644 > index 000000000000..3e2ada7fcdf9 > --- /dev/null > +++ b/Documentation/devicetree/bindings/bus/fsl,imx8mp-aipstz.yaml > @@ -0,0 +1,104 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/bus/fsl,imx8mp-aipstz.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Secure AHB to IP Slave bus (AIPSTZ) bridge > + > +description: > + The secure AIPS bridge (AIPSTZ) acts as a bridge for AHB masters issuing > + transactions to IP Slave peripherals. Additionally, this module offers access > + control configurations meant to restrict which peripherals a master can > + access. > + > +maintainers: > + - Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> > + > +properties: > + compatible: > + const: fsl,imx8mp-aipstz > + > + reg: > + maxItems: 1 > + > + power-domains: > + maxItems: 1 > + > + "#address-cells": > + const: 1 > + > + "#size-cells": > + const: 1 > + > + "#access-controller-cells": > + const: 3 > + description: > + First cell - consumer type (master or peripheral) > + Second cell - consumer ID > + Third cell - configuration value Generally the ID would be first though providers can really define whatever they want. Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/bus/fsl,imx8mp-aipstz.yaml b/Documentation/devicetree/bindings/bus/fsl,imx8mp-aipstz.yaml new file mode 100644 index 000000000000..3e2ada7fcdf9 --- /dev/null +++ b/Documentation/devicetree/bindings/bus/fsl,imx8mp-aipstz.yaml @@ -0,0 +1,104 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bus/fsl,imx8mp-aipstz.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Secure AHB to IP Slave bus (AIPSTZ) bridge + +description: + The secure AIPS bridge (AIPSTZ) acts as a bridge for AHB masters issuing + transactions to IP Slave peripherals. Additionally, this module offers access + control configurations meant to restrict which peripherals a master can + access. + +maintainers: + - Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> + +properties: + compatible: + const: fsl,imx8mp-aipstz + + reg: + maxItems: 1 + + power-domains: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + "#access-controller-cells": + const: 3 + description: + First cell - consumer type (master or peripheral) + Second cell - consumer ID + Third cell - configuration value + + ranges: true + +# borrowed from simple-bus.yaml, no additional requirements for children +patternProperties: + "@(0|[1-9a-f][0-9a-f]*)$": + type: object + additionalProperties: true + properties: + reg: + items: + minItems: 2 + maxItems: 4 + minItems: 1 + maxItems: 1024 + ranges: + oneOf: + - items: + minItems: 3 + maxItems: 7 + minItems: 1 + maxItems: 1024 + - $ref: /schemas/types.yaml#/definitions/flag + anyOf: + - required: + - reg + - required: + - ranges + +required: + - compatible + - reg + - power-domains + - "#address-cells" + - "#size-cells" + - "#access-controller-cells" + - ranges + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/imx8mp-clock.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + bus@30df0000 { + compatible = "fsl,imx8mp-aipstz"; + reg = <0x30df0000 0x10000>; + ranges = <0x30c00000 0x30c00000 0x400000>; + power-domains = <&pgc_audio>; + #address-cells = <1>; + #size-cells = <1>; + #access-controller-cells = <3>; + + dma-controller@30e00000 { + compatible = "fsl,imx8mp-sdma", "fsl,imx8mq-sdma"; + reg = <0x30e00000 0x10000>; + #dma-cells = <3>; + clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SDMA3_ROOT>, + <&clk IMX8MP_CLK_AUDIO_ROOT>; + clock-names = "ipg", "ahb"; + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin"; + }; + };