diff mbox series

[1/2] drm/i915/display: Add macro for checking 3 DSC engines

Message ID 20250414024256.2782702-2-ankit.k.nautiyal@intel.com (mailing list archive)
State New
Headers show
Series Macro for 3 DSC engines per pipe | expand

Commit Message

Nautiyal, Ankit K April 14, 2025, 2:42 a.m. UTC
3 DSC engines per pipe is currently supported only for BMG.
Add a macro to check whether a platform supports 3 DSC engines per pipe.

Bspec: 50175
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_device.h | 1 +
 1 file changed, 1 insertion(+)

Comments

Kandpal, Suraj April 14, 2025, 3:48 a.m. UTC | #1
> -----Original Message-----
> From: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>
> Sent: Monday, April 14, 2025 8:13 AM
> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
> Cc: Kandpal, Suraj <suraj.kandpal@intel.com>; stable@vger.kernel.org;
> Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>
> Subject: [PATCH 1/2] drm/i915/display: Add macro for checking 3 DSC engines
> 
> 3 DSC engines per pipe is currently supported only for BMG.

Would it be better to have a function here which can be modified later to add more
platforms in future if they decide to add 3 DSC engine elsewhere too?

> Add a macro to check whether a platform supports 3 DSC engines per pipe.
> 
> Bspec: 50175
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_device.h | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
> b/drivers/gpu/drm/i915/display/intel_display_device.h
> index 368b0d3417c2..1a215791d0ba 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -163,6 +163,7 @@ struct intel_display_platforms {
>  #define HAS_DP_MST(__display)		(DISPLAY_INFO(__display)-
> >has_dp_mst)
>  #define HAS_DSB(__display)		(DISPLAY_INFO(__display)->has_dsb)
>  #define HAS_DSC(__display)		(DISPLAY_RUNTIME_INFO(__display)-
> >has_dsc)
> +#define HAS_DSC_3ENGINES(__display)	(DISPLAY_VERx100(display) == 1401

Shouldn't this be __display instead of just display

Regards,
Suraj Kandpal

> && HAS_DSC(__display))
>  #define HAS_DSC_MST(__display)		(DISPLAY_VER(__display) >= 12
> && HAS_DSC(__display))
>  #define HAS_FBC(__display)		(DISPLAY_RUNTIME_INFO(__display)-
> >fbc_mask != 0)
>  #define HAS_FBC_DIRTY_RECT(__display)	(DISPLAY_VER(__display) >=
> 30)
> --
> 2.34.1
Nautiyal, Ankit K April 14, 2025, 4:05 a.m. UTC | #2
On 4/14/2025 9:18 AM, Kandpal, Suraj wrote:
>
>> -----Original Message-----
>> From: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>
>> Sent: Monday, April 14, 2025 8:13 AM
>> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
>> Cc: Kandpal, Suraj <suraj.kandpal@intel.com>; stable@vger.kernel.org;
>> Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>
>> Subject: [PATCH 1/2] drm/i915/display: Add macro for checking 3 DSC engines
>>
>> 3 DSC engines per pipe is currently supported only for BMG.
> Would it be better to have a function here which can be modified later to add more
> platforms in future if they decide to add 3 DSC engine elsewhere too?

I was thinking about it too but it seems this is not going to be 
commonly used and perhaps we can add specific platforms in the macro as 
well.


>
>> Add a macro to check whether a platform supports 3 DSC engines per pipe.
>>
>> Bspec: 50175
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_display_device.h | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
>> b/drivers/gpu/drm/i915/display/intel_display_device.h
>> index 368b0d3417c2..1a215791d0ba 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
>> @@ -163,6 +163,7 @@ struct intel_display_platforms {
>>   #define HAS_DP_MST(__display)		(DISPLAY_INFO(__display)-
>>> has_dp_mst)
>>   #define HAS_DSB(__display)		(DISPLAY_INFO(__display)->has_dsb)
>>   #define HAS_DSC(__display)		(DISPLAY_RUNTIME_INFO(__display)-
>>> has_dsc)
>> +#define HAS_DSC_3ENGINES(__display)	(DISPLAY_VERx100(display) == 1401
> Shouldn't this be __display instead of just display

You are right, this should have been __display.


Regards,

Ankit

>
> Regards,
> Suraj Kandpal
>
>> && HAS_DSC(__display))
>>   #define HAS_DSC_MST(__display)		(DISPLAY_VER(__display) >= 12
>> && HAS_DSC(__display))
>>   #define HAS_FBC(__display)		(DISPLAY_RUNTIME_INFO(__display)-
>>> fbc_mask != 0)
>>   #define HAS_FBC_DIRTY_RECT(__display)	(DISPLAY_VER(__display) >=
>> 30)
>> --
>> 2.34.1
Kandpal, Suraj April 14, 2025, 4:06 a.m. UTC | #3
> -----Original Message-----
> From: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>
> Sent: Monday, April 14, 2025 9:36 AM
> To: Kandpal, Suraj <suraj.kandpal@intel.com>; intel-gfx@lists.freedesktop.org;
> intel-xe@lists.freedesktop.org
> Cc: stable@vger.kernel.org
> Subject: Re: [PATCH 1/2] drm/i915/display: Add macro for checking 3 DSC
> engines
> 
> 
> On 4/14/2025 9:18 AM, Kandpal, Suraj wrote:
> >
> >> -----Original Message-----
> >> From: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>
> >> Sent: Monday, April 14, 2025 8:13 AM
> >> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
> >> Cc: Kandpal, Suraj <suraj.kandpal@intel.com>; stable@vger.kernel.org;
> >> Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>
> >> Subject: [PATCH 1/2] drm/i915/display: Add macro for checking 3 DSC
> >> engines
> >>
> >> 3 DSC engines per pipe is currently supported only for BMG.
> > Would it be better to have a function here which can be modified later
> > to add more platforms in future if they decide to add 3 DSC engine elsewhere
> too?
> 
> I was thinking about it too but it seems this is not going to be commonly used
> and perhaps we can add specific platforms in the macro as well.

Ohkay if that’s the case then it seems okay to me

> 
> 
> >
> >> Add a macro to check whether a platform supports 3 DSC engines per pipe.
> >>
> >> Bspec: 50175
> >> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> >> ---
> >>   drivers/gpu/drm/i915/display/intel_display_device.h | 1 +
> >>   1 file changed, 1 insertion(+)
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
> >> b/drivers/gpu/drm/i915/display/intel_display_device.h
> >> index 368b0d3417c2..1a215791d0ba 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> >> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> >> @@ -163,6 +163,7 @@ struct intel_display_platforms {
> >>   #define HAS_DP_MST(__display)		(DISPLAY_INFO(__display)-
> >>> has_dp_mst)
> >>   #define HAS_DSB(__display)		(DISPLAY_INFO(__display)->has_dsb)
> >>   #define HAS_DSC(__display)		(DISPLAY_RUNTIME_INFO(__display)-
> >>> has_dsc)
> >> +#define HAS_DSC_3ENGINES(__display)	(DISPLAY_VERx100(display) ==
> 1401
> > Shouldn't this be __display instead of just display
> 
> You are right, this should have been __display.
> 
> 
> Regards,
> 
> Ankit
> 
> >
> > Regards,
> > Suraj Kandpal
> >
> >> && HAS_DSC(__display))
> >>   #define HAS_DSC_MST(__display)		(DISPLAY_VER(__display) >= 12
> >> && HAS_DSC(__display))
> >>   #define HAS_FBC(__display)		(DISPLAY_RUNTIME_INFO(__display)-
> >>> fbc_mask != 0)
> >>   #define HAS_FBC_DIRTY_RECT(__display)	(DISPLAY_VER(__display) >=
> >> 30)
> >> --
> >> 2.34.1
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 368b0d3417c2..1a215791d0ba 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -163,6 +163,7 @@  struct intel_display_platforms {
 #define HAS_DP_MST(__display)		(DISPLAY_INFO(__display)->has_dp_mst)
 #define HAS_DSB(__display)		(DISPLAY_INFO(__display)->has_dsb)
 #define HAS_DSC(__display)		(DISPLAY_RUNTIME_INFO(__display)->has_dsc)
+#define HAS_DSC_3ENGINES(__display)	(DISPLAY_VERx100(display) == 1401 && HAS_DSC(__display))
 #define HAS_DSC_MST(__display)		(DISPLAY_VER(__display) >= 12 && HAS_DSC(__display))
 #define HAS_FBC(__display)		(DISPLAY_RUNTIME_INFO(__display)->fbc_mask != 0)
 #define HAS_FBC_DIRTY_RECT(__display)	(DISPLAY_VER(__display) >= 30)