| Message ID | 20250410-clk-cdce6214-v3-2-d73cf9ff3d80@pengutronix.de (mailing list archive) |
|---|---|
| State | Under Review |
| Headers | show |
| Series | clk: add support for TI CDCE6214 | expand |
On Thu, Apr 10, 2025 at 12:34:57PM +0200, Sascha Hauer wrote: > The CDCE6214 is a Ultra-Low Power Clock Generator With One PLL, Four > Differential Outputs, Two Inputs, and Internal EEPROM. This patch adds > the device tree binding for this chip. > > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> > --- > .../devicetree/bindings/clock/ti,cdce6214.yaml | 155 +++++++++++++++++++++ > include/dt-bindings/clock/ti,cdce6214.h | 24 ++++ > 2 files changed, 179 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/ti,cdce6214.yaml b/Documentation/devicetree/bindings/clock/ti,cdce6214.yaml > new file mode 100644 > index 0000000000000..12737e67dcf2d > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/ti,cdce6214.yaml > @@ -0,0 +1,155 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/ti,cdce6214.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: TI CDCE6214 programmable clock generator with PLL > + > +maintainers: > + - Sascha Hauer <s.hauer@pengutronix.de> > + > +description: Needs '>' modifier > + Ultra-Low Power Clock Generator With One PLL, Four Differential Outputs, > + Two Inputs, and Internal EEPROM > + > + https://www.ti.com/product/CDCE6214 > + > +properties: > + compatible: > + enum: > + - ti,cdce6214 > + > + reg: > + maxItems: 1 > + > + clocks: > + minItems: 1 > + maxItems: 2 > + > + clock-names: > + minItems: 1 > + maxItems: 1 How can you have 2 clocks, but only 1 name? See my reply on v2. > + items: > + enum: [ priref, secref ]
On Fri, Apr 11, 2025 at 12:21:49PM -0500, Rob Herring wrote: > On Thu, Apr 10, 2025 at 12:34:57PM +0200, Sascha Hauer wrote: > > The CDCE6214 is a Ultra-Low Power Clock Generator With One PLL, Four > > Differential Outputs, Two Inputs, and Internal EEPROM. This patch adds > > the device tree binding for this chip. > > > > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> > > --- > > .../devicetree/bindings/clock/ti,cdce6214.yaml | 155 +++++++++++++++++++++ > > include/dt-bindings/clock/ti,cdce6214.h | 24 ++++ > > 2 files changed, 179 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/clock/ti,cdce6214.yaml b/Documentation/devicetree/bindings/clock/ti,cdce6214.yaml > > new file mode 100644 > > index 0000000000000..12737e67dcf2d > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/clock/ti,cdce6214.yaml > > @@ -0,0 +1,155 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/clock/ti,cdce6214.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: TI CDCE6214 programmable clock generator with PLL > > + > > +maintainers: > > + - Sascha Hauer <s.hauer@pengutronix.de> > > + > > +description: > > Needs '>' modifier Ok. > > > + Ultra-Low Power Clock Generator With One PLL, Four Differential Outputs, > > + Two Inputs, and Internal EEPROM > > + > > + https://www.ti.com/product/CDCE6214 > > + > > +properties: > > + compatible: > > + enum: > > + - ti,cdce6214 > > + > > + reg: > > + maxItems: 1 > > + > > + clocks: > > + minItems: 1 > > + maxItems: 2 > > + > > + clock-names: > > + minItems: 1 > > + maxItems: 1 > > How can you have 2 clocks, but only 1 name? See my reply on v2. maxItems: 1 is wrong. Should be 2. Sascha
On Thu, Apr 10, 2025 at 12:34:57PM GMT, Sascha Hauer wrote: > + }; > + }; > diff --git a/include/dt-bindings/clock/ti,cdce6214.h b/include/dt-bindings/clock/ti,cdce6214.h > new file mode 100644 > index 0000000000000..1b41060896cc3 > --- /dev/null > +++ b/include/dt-bindings/clock/ti,cdce6214.h > @@ -0,0 +1,24 @@ > +#ifndef _DT_BINDINGS_CLK_TI_CDCE6214_H > +#define _DT_BINDINGS_CLK_TI_CDCE6214_H Missing license. Please run scripts/checkpatch.pl on the patches and fix reported warnings. After that, run also 'scripts/checkpatch.pl --strict' on the patches and (probably) fix more warnings. Some warnings can be ignored, especially from --strict run, but the code here looks like it needs a fix. Feel free to get in touch if the warning is not clear. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/clock/ti,cdce6214.yaml b/Documentation/devicetree/bindings/clock/ti,cdce6214.yaml new file mode 100644 index 0000000000000..12737e67dcf2d --- /dev/null +++ b/Documentation/devicetree/bindings/clock/ti,cdce6214.yaml @@ -0,0 +1,155 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/ti,cdce6214.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI CDCE6214 programmable clock generator with PLL + +maintainers: + - Sascha Hauer <s.hauer@pengutronix.de> + +description: + Ultra-Low Power Clock Generator With One PLL, Four Differential Outputs, + Two Inputs, and Internal EEPROM + + https://www.ti.com/product/CDCE6214 + +properties: + compatible: + enum: + - ti,cdce6214 + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 2 + + clock-names: + minItems: 1 + maxItems: 1 + items: + enum: [ priref, secref ] + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + '#clock-cells': + const: 1 + +patternProperties: + '^clk@[0-1]$': + type: object + description: + optional child node that can be used to specify input pin parameters. The reg + properties match the CDCE6214_CLK_* defines. + + additionalProperties: false + + properties: + reg: + description: + clock input identifier. + minimum: 0 + maximum: 1 + + ti,clkin-fmt: + enum: [ lvcmos, xtal, differential ] + description: + Clock input format. + + ti,xo-cload-femtofarads: + description: + Selects load cap for XO in femto Farad (fF). Up to 9000fF + minimum: 3000 + maximum: 9000 + + ti,xo-bias-current-microamp: + description: + Bias current setting of the XO. + minimum: 0 + maximum: 1758 + + '^clk@[2-9]$': + type: object + description: + optional child node that can be used to specify output pin parameters. The reg + properties match the CDCE6214_CLK_* defines. + + additionalProperties: false + + properties: + reg: + description: + clock output identifier. + minimum: 2 + maximum: 9 + + ti,clkout-fmt: + enum: [ cmos, lvds, lp-hcsl ] + description: + Clock input format. + + ti,cmosn-mode: + enum: [ disabled, high, low ] + description: + CMOSN output mode. + + ti,cmosp-mode: + enum: [ disabled, high, low ] + description: + CMOSP output mode. + +required: + - compatible + - reg + - clocks + - '#clock-cells' + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + clock-generator@67 { + compatible = "ti,cdce6214"; + reg = <0x67>; + #address-cells = <1>; + #size-cells = <0>; + #clock-cells = <1>; + clocks = <&clock_ref25m>; + clock-names = "secref"; + + clk@1 { + reg = <1>; // CDCE6214_CLK_SECREF + ti,clkin-fmt = "xtal"; + ti,xo-cload-femtofarads = <4400>; + ti,xo-bias-current-microamp = <295>; + }; + + clk@3 { + reg = <3>; // CDCE6214_CLK_OUT1 + ti,clkout-fmt = "cmos"; + ti,cmosp-mode = "high"; + ti,cmosn-mode = "low"; + }; + + clk@4 { + reg = <4>; // CDCE6214_CLK_OUT2 + ti,clkout-fmt = "lvds"; + }; + + clk@6 { + reg = <6>; // CDCE6214_CLK_OUT4 + ti,clkout-fmt = "lp-hcsl"; + }; + }; + }; diff --git a/include/dt-bindings/clock/ti,cdce6214.h b/include/dt-bindings/clock/ti,cdce6214.h new file mode 100644 index 0000000000000..1b41060896cc3 --- /dev/null +++ b/include/dt-bindings/clock/ti,cdce6214.h @@ -0,0 +1,24 @@ +#ifndef _DT_BINDINGS_CLK_TI_CDCE6214_H +#define _DT_BINDINGS_CLK_TI_CDCE6214_H + +/* + * primary/secondary inputs. Not registered as clocks, but used + * as reg properties for the subnodes specifying the input properties + */ +#define CDCE6214_CLK_PRIREF 0 +#define CDCE6214_CLK_SECREF 1 + +/* + * Clock indices for the clocks provided by the CDCE6214. Also used + * as reg properties for the subnodes specifying the output properties + */ +#define CDCE6214_CLK_OUT0 2 +#define CDCE6214_CLK_OUT1 3 +#define CDCE6214_CLK_OUT2 4 +#define CDCE6214_CLK_OUT3 5 +#define CDCE6214_CLK_OUT4 6 +#define CDCE6214_CLK_PLL 7 +#define CDCE6214_CLK_PSA 8 +#define CDCE6214_CLK_PSB 9 + +#endif /* _DT_BINDINGS_CLK_TI_CDCE6214_H */
The CDCE6214 is a Ultra-Low Power Clock Generator With One PLL, Four Differential Outputs, Two Inputs, and Internal EEPROM. This patch adds the device tree binding for this chip. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> --- .../devicetree/bindings/clock/ti,cdce6214.yaml | 155 +++++++++++++++++++++ include/dt-bindings/clock/ti,cdce6214.h | 24 ++++ 2 files changed, 179 insertions(+)